FSP & CBMEM: Fix broken cbmem CAR transition.

1) Save the pointer to the FSP HOB list to low memory at address 0x614.

This is the same location as CBMEM_RESUME_BACKUP - the two aren't used
in the same platform, so overlapping should be OK.  I didn't see any
documentation that actually said that this location was free to use, and
didn't need to be restored after use in S3 resume, but it looks like
the DOS boot vector gets loaded juat above this location, so it SHOULD
be ok.  The alternative is to copy the memory out and store it in cbmem
until we're ready to restore it.

2) When a request for the pointer to a CAR variable comes in, pass back
the location inside the FSP hob structure.

3) Skip the memcopy of the CAR Data.   The CAR variables do not
get transitioned back into cbmem, but used out of the HOB structure.

4) Remove the BROKEN_CAR_MIGRATE Kconfig option from the FSP platform.

Change-Id: Iaf566dce1b41a3bcb17e4134877f68262b5e113f
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/8196
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

8 files changed, 22 insertions, 10 deletions

diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig
index ea99ee0c7d..05bdce4efe 100644
--- a/src/cpu/intel/fsp_model_206ax/Kconfig
+++ b/src/cpu/intel/fsp_model_206ax/Kconfig
@@ -41,7 +41,6 @@ config CPU_SPECIFIC_OPTIONS
 	select PARALLEL_CPU_INIT
 	select TSC_SYNC_MFENCE
 	select LAPIC_MONOTONIC_TIMER
-	select BROKEN_CAR_MIGRATE
 
 config BOOTBLOCK_CPU_INIT
 	string
diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig
index c3acc7846a..ec4be847b0 100644
--- a/src/cpu/intel/fsp_model_406dx/Kconfig
+++ b/src/cpu/intel/fsp_model_406dx/Kconfig
@@ -36,7 +36,6 @@ config CPU_SPECIFIC_OPTIONS
 	select PARALLEL_CPU_INIT
 	select TSC_SYNC_MFENCE
 	select LAPIC_MONOTONIC_TIMER
-	select BROKEN_CAR_MIGRATE
 
 choice
 	prompt "Rangeley CPU Stepping"
diff --git a/src/cpu/x86/car.c b/src/cpu/x86/car.c
index cca9afd694..9f1a26e3d3 100644
--- a/src/cpu/x86/car.c
+++ b/src/cpu/x86/car.c
@@ -23,6 +23,9 @@
 #include <cbmem.h>
 #include <arch/early_variables.h>
 
+#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP)
+#include <drivers/intel/fsp/fsp_util.h>
+#endif
 typedef void (* const car_migration_func_t)(void);
 
 extern car_migration_func_t _car_migrate_start;
@@ -41,10 +44,13 @@ extern char _car_data_end[];
  */
 static int car_migrated CAR_GLOBAL;
 
-
+/** @brief returns pointer to a CAR variable, before or after migration.
+ *
+ * @param var pointer to the CAR variable
+ */
 void *car_get_var_ptr(void *var)
 {
-	char *migrated_base;
+	char *migrated_base = NULL;
 	int offset;
 	void * _car_start = &_car_data_start;
 	void * _car_end = &_car_data_end;
@@ -61,12 +67,15 @@ void *car_get_var_ptr(void *var)
 		return var;
 	}
 
+#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP)
+	migrated_base=(char *)find_saved_temp_mem(
+			*(void **)CBMEM_FSP_HOB_PTR);
+#else
 	migrated_base = cbmem_find(CBMEM_ID_CAR_GLOBALS);
+#endif
 
-	if (migrated_base == NULL) {
-		printk(BIOS_ERR, "CAR: Could not find migration base!\n");
-		return var;
-	}
+	if (migrated_base == NULL)
+		die( "CAR: Could not find migration base!\n");
 
 	offset = (char *)var - (char *)_car_start;
 
@@ -140,7 +149,7 @@ static void do_car_migrate_hooks(void)
 
 void car_migrate_variables(void)
 {
-	if (!IS_ENABLED(CONFIG_BROKEN_CAR_MIGRATE))
+	if (!IS_ENABLED(CONFIG_BROKEN_CAR_MIGRATE) && !IS_ENABLED(PLATFORM_USES_FSP))
 		do_car_migrate_variables();
 
 	if (!IS_ENABLED(CONFIG_BROKEN_CAR_MIGRATE))
diff --git a/src/include/cbmem.h b/src/include/cbmem.h
index ca7a5f4c5c..2f86b85a1f 100644
--- a/src/include/cbmem.h
+++ b/src/include/cbmem.h
@@ -40,6 +40,7 @@
  */
 #define CBMEM_BOOT_MODE		0x610
 #define CBMEM_RESUME_BACKUP	0x614
+#define CBMEM_FSP_HOB_PTR	0x614
 
 #define CBMEM_ID_FREESPACE	0x46524545
 #define CBMEM_ID_GDT		0x4c474454
diff --git a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
index 3f8690a388..949cf2a767 100644
--- a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
+++ b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
@@ -174,6 +174,8 @@ void chipset_fsp_early_init(FSP_INIT_PARAMS *pFspInitParams,
 void ChipsetFspReturnPoint(EFI_STATUS Status,
 		VOID *HobListPtr)
 {
+	*(void **)CBMEM_FSP_HOB_PTR=HobListPtr;
+
 	if (Status == 0xFFFFFFFF) {
 		soft_reset();
 	}
diff --git a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c
index a666d701d7..716873c182 100644
--- a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c
+++ b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c
@@ -107,6 +107,7 @@ void chipset_fsp_early_init(FSP_INIT_PARAMS *FspInitParams,
 void ChipsetFspReturnPoint(EFI_STATUS Status,
 		VOID *HobListPtr)
 {
+	*(void **)CBMEM_FSP_HOB_PTR=HobListPtr;
 	if (Status == 0xFFFFFFFF) {
 		hard_reset();
 	}
diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig
index b05def20cc..0ebb5c7ba2 100644
--- a/src/soc/intel/fsp_baytrail/Kconfig
+++ b/src/soc/intel/fsp_baytrail/Kconfig
@@ -50,7 +50,6 @@ config CPU_SPECIFIC_OPTIONS
 	select SUPPORT_CPU_UCODE_IN_CBFS if INCLUDE_MICROCODE_IN_BUILD
 	select CPU_MICROCODE_ADDED_DURING_BUILD if INCLUDE_MICROCODE_IN_BUILD
 	select ROMSTAGE_RTC_INIT
-	select BROKEN_CAR_MIGRATE
 
 config BOOTBLOCK_CPU_INIT
 	string
diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
index c6b5f9cffe..b8c1bf6caa 100644
--- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
+++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
@@ -329,6 +329,8 @@ void chipset_fsp_early_init(FSP_INIT_PARAMS *pFspInitParams,
 void ChipsetFspReturnPoint(EFI_STATUS Status,
 		VOID *HobListPtr)
 {
+	*(void **)CBMEM_FSP_HOB_PTR=HobListPtr;
+
 	if (Status == 0xFFFFFFFF) {
 		warm_reset();
 	}