diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2022-11-12 23:15:12 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-20 16:46:44 +0000 |
| commit | 57789db4d218c7eee4e745ec46c2228eadb57846 (patch) | |
| tree | fefdf664339034a8cf8ba1cd9e03e2b51de3a29c | |
| parent | 0dd4494063196f96502a816119d5af6045ac7351 (diff) | |
mb/starlabs/starbook/adl: Set thermal trip based on power profile
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I07be0aa2144b7718e28f1f675978b4b4b92752ae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69492
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/starlabs/starbook/variants/adl/devtree.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/mainboard/starlabs/starbook/variants/adl/devtree.c b/src/mainboard/starlabs/starbook/variants/adl/devtree.c index d15b9a78aa..773c9036d0 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/devtree.c +++ b/src/mainboard/starlabs/starbook/variants/adl/devtree.c @@ -12,6 +12,9 @@ void devtree_update(void) { config_t *cfg = config_of_soc(); + struct soc_intel_common_config *common_config; + common_config = chip_get_common_soc_structure(); + struct soc_power_limits_config *soc_conf_10core = &cfg->power_limits_config[ADL_P_282_482_28W_CORE]; @@ -28,21 +31,21 @@ void devtree_update(void) soc_conf_12core->tdp_pl1_override = 15; soc_conf_10core->tdp_pl2_override = 15; soc_conf_12core->tdp_pl2_override = 15; - // TODO:common_config->pch_thermal_trip = 20; + common_config->pch_thermal_trip = 20; break; case PP_BALANCED: soc_conf_10core->tdp_pl1_override = 15; soc_conf_12core->tdp_pl1_override = 15; soc_conf_10core->tdp_pl2_override = 25; soc_conf_12core->tdp_pl2_override = 25; - // TODO:common_config->pch_thermal_trip = 15; + common_config->pch_thermal_trip = 15; break; case PP_PERFORMANCE: soc_conf_10core->tdp_pl1_override = 28; soc_conf_12core->tdp_pl1_override = 28; soc_conf_10core->tdp_pl2_override = 40; soc_conf_12core->tdp_pl2_override = 40; - // TODO:common_config->pch_thermal_trip = 10; + common_config->pch_thermal_trip = 10; break; } |