diff options
author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-16 16:38:26 -0700 |
---|---|---|
committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-17 01:52:54 +0100 |
commit | 573564cca8cd01cadf179546b8b124694fd3dcbb (patch) | |
tree | bb2c4c9c61b07f6a9a3c94446927341492f56afe | |
parent | 6a1503e9db4bb9b5e6bb47f298eb3677c0673bc4 (diff) |
soc/intel/skylake: Add int to unsigned
Fix the following warning detected by checkpatch.pl:
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
TEST=Build for glados
Change-Id: Idc2ad265e8ed8cd7fd6d228cfbe4cbbcb9d3ebfc
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18866
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
-rw-r--r-- | src/soc/intel/skylake/bootblock/i2c.c | 4 | ||||
-rw-r--r-- | src/soc/intel/skylake/chip.c | 3 | ||||
-rw-r--r-- | src/soc/intel/skylake/chip.h | 2 | ||||
-rw-r--r-- | src/soc/intel/skylake/cpu.c | 4 | ||||
-rw-r--r-- | src/soc/intel/skylake/flash_controller.c | 8 | ||||
-rw-r--r-- | src/soc/intel/skylake/i2c.c | 2 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/fsp11/soc/romstage.h | 2 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/fsp20/soc/romstage.h | 2 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/soc/flash_controller.h | 12 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/soc/pci_devs.h | 6 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/soc/smbus.h | 8 | ||||
-rw-r--r-- | src/soc/intel/skylake/smbus_common.c | 11 |
12 files changed, 33 insertions, 31 deletions
diff --git a/src/soc/intel/skylake/bootblock/i2c.c b/src/soc/intel/skylake/bootblock/i2c.c index 92ca861dcb..11d145c7bf 100644 --- a/src/soc/intel/skylake/bootblock/i2c.c +++ b/src/soc/intel/skylake/bootblock/i2c.c @@ -25,7 +25,7 @@ #include <soc/serialio.h> #include "chip.h" -uintptr_t lpss_i2c_base_address(unsigned bus) +uintptr_t lpss_i2c_base_address(unsigned int bus) { int devfn; pci_devfn_t dev; @@ -42,7 +42,7 @@ uintptr_t lpss_i2c_base_address(unsigned bus) return ALIGN_DOWN(pci_read_config32(dev, PCI_BASE_ADDRESS_0), 16); } -static void i2c_early_init_bus(unsigned bus) +static void i2c_early_init_bus(unsigned int bus) { ROMSTAGE_CONST struct soc_intel_skylake_config *config; ROMSTAGE_CONST struct device *tree_dev; diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 744f5491a1..6d9dedb730 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -801,7 +801,8 @@ void soc_display_silicon_init_params(const SILICON_INIT_UPD *original, params->SendVrMbxCmd); } -static void pci_set_subsystem(device_t dev, unsigned vendor, unsigned device) +static void pci_set_subsystem(device_t dev, unsigned int vendor, + unsigned int device) { if (!vendor || !device) pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 69b5364198..17b34b72e8 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -408,7 +408,7 @@ struct soc_intel_skylake_config { * "\\_SB.PCI0.GPIO", 0, ResourceConsumer) * { sdcard_cd_gpio_default } */ - unsigned sdcard_cd_gpio_default; + unsigned int sdcard_cd_gpio_default; /* Use custom SD card detect GPIO configuration */ struct acpi_gpio sdcard_cd_gpio; diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index 6a8f48f3a6..4c2aa7fc57 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -117,8 +117,8 @@ void set_power_limits(u8 power_limit_1_time) { msr_t msr = rdmsr(MSR_PLATFORM_INFO); msr_t limit; - unsigned power_unit; - unsigned tdp, min_power, max_power, max_time, tdp_pl2; + unsigned int power_unit; + unsigned int tdp, min_power, max_power, max_time, tdp_pl2; u8 power_limit_1_val; device_t dev = SA_DEV_ROOT; config_t *conf = dev->chip_info; diff --git a/src/soc/intel/skylake/flash_controller.c b/src/soc/intel/skylake/flash_controller.c index 476a08c6e1..ac6758e2eb 100644 --- a/src/soc/intel/skylake/flash_controller.c +++ b/src/soc/intel/skylake/flash_controller.c @@ -219,8 +219,8 @@ int pch_hwseq_read(const struct spi_flash *flash, u32 addr, size_t len, if (addr + len > spi_get_flash_size(get_spi_bar())) { printk(BIOS_ERR, "Attempt to read %x-%x which is out of chip\n", - (unsigned) addr, - (unsigned) addr+(unsigned) len); + (unsigned int) addr, + (unsigned int) addr + (unsigned int)len); return -1; } @@ -285,7 +285,7 @@ int pch_hwseq_write(const struct spi_flash *flash, u32 addr, size_t len, if (addr + len > spi_get_flash_size(spi_bar)) { printk(BIOS_ERR, "Attempt to write 0x%x-0x%x which is out of chip\n", - (unsigned)addr, (unsigned) (addr+len)); + (unsigned int)addr, (unsigned int)(addr + len)); return -1; } @@ -307,7 +307,7 @@ int pch_hwseq_write(const struct spi_flash *flash, u32 addr, size_t len, len -= block_len; } printk(BIOS_DEBUG, "SF: Successfully written %u bytes @ %#x\n", - (unsigned) (addr - start), start); + (unsigned int)(addr - start), start); return 0; } diff --git a/src/soc/intel/skylake/i2c.c b/src/soc/intel/skylake/i2c.c index d12323f94f..25cc8e89bc 100644 --- a/src/soc/intel/skylake/i2c.c +++ b/src/soc/intel/skylake/i2c.c @@ -22,7 +22,7 @@ #include <soc/intel/common/lpss_i2c.h> #include <soc/ramstage.h> -uintptr_t lpss_i2c_base_address(unsigned bus) +uintptr_t lpss_i2c_base_address(unsigned int bus) { int devfn; struct device *dev; diff --git a/src/soc/intel/skylake/include/fsp11/soc/romstage.h b/src/soc/intel/skylake/include/fsp11/soc/romstage.h index 6c40bd626d..f3e4371352 100644 --- a/src/soc/intel/skylake/include/fsp11/soc/romstage.h +++ b/src/soc/intel/skylake/include/fsp11/soc/romstage.h @@ -22,7 +22,7 @@ void systemagent_early_init(void); void intel_early_me_status(void); void enable_smbus(void); -int smbus_read_byte(unsigned device, unsigned address); +int smbus_read_byte(unsigned int device, unsigned int address); int early_spi_read_wpsr(u8 *sr); void mainboard_fill_spd_data(struct pei_data *pei_data); diff --git a/src/soc/intel/skylake/include/fsp20/soc/romstage.h b/src/soc/intel/skylake/include/fsp20/soc/romstage.h index 41658e1dbd..37e1e06fc9 100644 --- a/src/soc/intel/skylake/include/fsp20/soc/romstage.h +++ b/src/soc/intel/skylake/include/fsp20/soc/romstage.h @@ -23,7 +23,7 @@ asmlinkage void *car_stage_c_entry(void); void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); -int smbus_read_byte(unsigned device, unsigned address); +int smbus_read_byte(unsigned int device, unsigned int address); int early_spi_read_wpsr(u8 *sr); /* Board type */ enum board_type { diff --git a/src/soc/intel/skylake/include/soc/flash_controller.h b/src/soc/intel/skylake/include/soc/flash_controller.h index 25e77344e5..712a18df19 100644 --- a/src/soc/intel/skylake/include/soc/flash_controller.h +++ b/src/soc/intel/skylake/include/soc/flash_controller.h @@ -35,7 +35,7 @@ static u8 readb_(const void *addr) { u8 v = read8(addr); printk(BIOS_DEBUG, "read %2.2x from %4.4x\n", - v, ((unsigned) addr & 0xffff) - 0xf020); + v, ((unsigned int) addr & 0xffff) - 0xf020); return v; } @@ -43,7 +43,7 @@ static u16 readw_(const void *addr) { u16 v = read16(addr); printk(BIOS_DEBUG, "read %4.4x from %4.4x\n", - v, ((unsigned) addr & 0xffff) - 0xf020); + v, ((unsigned int) addr & 0xffff) - 0xf020); return v; } @@ -51,7 +51,7 @@ static u32 readl_(const void *addr) { u32 v = read32(addr); printk(BIOS_DEBUG, "read %8.8x from %4.4x\n", - v, ((unsigned) addr & 0xffff) - 0xf020); + v, ((unsigned int) addr & 0xffff) - 0xf020); return v; } @@ -59,21 +59,21 @@ static void writeb_(u8 b, void *addr) { write8(addr, b); printk(BIOS_DEBUG, "wrote %2.2x to %4.4x\n", - b, ((unsigned) addr & 0xffff) - 0xf020); + b, ((unsigned int) addr & 0xffff) - 0xf020); } static void writew_(u16 b, void *addr) { write16(addr, b); printk(BIOS_DEBUG, "wrote %4.4x to %4.4x\n", - b, ((unsigned) addr & 0xffff) - 0xf020); + b, ((unsigned int) addr & 0xffff) - 0xf020); } static void writel_(u32 b, void *addr) { write32(addr, b); printk(BIOS_DEBUG, "wrote %8.8x to %4.4x\n", - b, ((unsigned) addr & 0xffff) - 0xf020); + b, ((unsigned int) addr & 0xffff) - 0xf020); } #else /* CONFIG_DEBUG_SPI_FLASH ^^^ enabled vvv NOT enabled */ diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h index a19a7c6007..10d480664d 100644 --- a/src/soc/intel/skylake/include/soc/pci_devs.h +++ b/src/soc/intel/skylake/include/soc/pci_devs.h @@ -149,7 +149,7 @@ #define PCH_DEV_GBE _PCH_DEV(LPC, 6) /* Convert I2C bus number to PCI device and function */ -static inline int i2c_bus_to_devfn(unsigned bus) +static inline int i2c_bus_to_devfn(unsigned int bus) { switch (bus) { case 0: return PCH_DEVFN_I2C0; @@ -163,7 +163,7 @@ static inline int i2c_bus_to_devfn(unsigned bus) } /* Convert PCI device and function to I2C bus number */ -static inline int i2c_devfn_to_bus(unsigned devfn) +static inline int i2c_devfn_to_bus(unsigned int devfn) { switch (devfn) { case PCH_DEVFN_I2C0: return 0; @@ -176,7 +176,7 @@ static inline int i2c_devfn_to_bus(unsigned devfn) return -1; } -static inline int spi_devfn_to_bus(unsigned devfn) +static inline int spi_devfn_to_bus(unsigned int devfn) { switch (devfn) { case PCH_DEVFN_SPI: return 0; diff --git a/src/soc/intel/skylake/include/soc/smbus.h b/src/soc/intel/skylake/include/soc/smbus.h index 856b4a9d63..1e4d59bc24 100644 --- a/src/soc/intel/skylake/include/soc/smbus.h +++ b/src/soc/intel/skylake/include/soc/smbus.h @@ -54,9 +54,9 @@ #define SMBUS_TIMEOUT (10 * 1000 * 100) #define SMBUS_SLAVE_ADDR 0x24 -int do_smbus_read_byte(unsigned smbus_base, unsigned device, - unsigned address); -int do_smbus_write_byte(unsigned smbus_base, unsigned device, - unsigned address, unsigned data); +int do_smbus_read_byte(unsigned int smbus_base, unsigned int device, + unsigned int address); +int do_smbus_write_byte(unsigned int smbus_base, unsigned int device, + unsigned int address, unsigned int data); #endif diff --git a/src/soc/intel/skylake/smbus_common.c b/src/soc/intel/skylake/smbus_common.c index eee4e34eb6..63a4f8aad1 100644 --- a/src/soc/intel/skylake/smbus_common.c +++ b/src/soc/intel/skylake/smbus_common.c @@ -33,7 +33,7 @@ static void smbus_delay(void) static int smbus_wait_until_ready(u16 smbus_base) { - unsigned loops = SMBUS_TIMEOUT; + unsigned int loops = SMBUS_TIMEOUT; unsigned char byte; do { smbus_delay(); @@ -46,7 +46,7 @@ static int smbus_wait_until_ready(u16 smbus_base) static int smbus_wait_until_done(u16 smbus_base) { - unsigned loops = SMBUS_TIMEOUT; + unsigned int loops = SMBUS_TIMEOUT; unsigned char byte; do { smbus_delay(); @@ -57,7 +57,8 @@ static int smbus_wait_until_done(u16 smbus_base) return loops ? 0 : -1; } -int do_smbus_read_byte(unsigned smbus_base, unsigned device, unsigned address) +int do_smbus_read_byte(unsigned int smbus_base, unsigned int device, + unsigned int address) { unsigned char global_status_register; unsigned char byte; @@ -101,8 +102,8 @@ int do_smbus_read_byte(unsigned smbus_base, unsigned device, unsigned address) return byte; } -int do_smbus_write_byte(unsigned smbus_base, unsigned device, - unsigned address, unsigned data) +int do_smbus_write_byte(unsigned int smbus_base, unsigned int device, + unsigned int address, unsigned int data) { unsigned char global_status_register; |