printf: Automatically prefix %p with 0x

According to the POSIX standard, %p is supposed to print a pointer "as
if by %#x", meaning the "0x" prefix should automatically be prepended.
All other implementations out there (glibc, Linux, even libpayload) do
this, so we should make coreboot match. This patch changes vtxprintf()
accordingly and removes any explicit instances of "0x%p" from existing
format strings.

How to handle zero padding is less clear: the official POSIX definition
above technically says there should be no automatic zero padding, but in
practice most other implementations seem to do it and I assume most
programmers would prefer it. The way chosen here is to always zero-pad
to 32 bits, even on a 64-bit system. The rationale for this is that even
on 64-bit systems, coreboot always avoids using any memory above 4GB for
itself, so in practice all pointers should fit in that range and padding
everything to 64 bits would just hurt readability. Padding it this way
also helps pointers that do exceed 4GB (e.g. prints from MMU config on
some arm64 systems) stand out better from the others.

Change-Id: I0171b52f7288abb40e3fc3c8b874aee14b9bdcd6
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37626
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: David Guckian

52 files changed, 92 insertions, 91 deletions

diff --git a/payloads/libpayload/arch/arm/virtual.c b/payloads/libpayload/arch/arm/virtual.c
index acca057a8b..4337e28487 100644
--- a/payloads/libpayload/arch/arm/virtual.c
+++ b/payloads/libpayload/arch/arm/virtual.c
@@ -92,7 +92,7 @@ static void lpae_map_init(void)
 	/* get work block address */
 	work_block = ALIGN_UP((uintptr_t)_end, 2*MiB);
 	assert(work_block);
-	printf("Work block for LPAE mapping is @ 0x%p\n", (void *)work_block);
+	printf("Work block for LPAE mapping is @ %p\n", (void *)work_block);
 
 	/* get the address of the 1st pmd from pgd[0] */
 	pgd = (pgd_t *)((uintptr_t)read_ttbr0() & PGD_MASK);
diff --git a/payloads/libpayload/arch/arm64/mmu.c b/payloads/libpayload/arch/arm64/mmu.c
index 556f52b610..d1dd5b0147 100644
--- a/payloads/libpayload/arch/arm64/mmu.c
+++ b/payloads/libpayload/arch/arm64/mmu.c
@@ -273,7 +273,7 @@ uint64_t mmu_init(struct mmu_ranges *mmu_ranges)
 	max_tables = (TTB_DEFAULT_SIZE >> GRANULE_SIZE_SHIFT);
 	free_idx = 1;
 
-	printf("Libpayload ARM64: TTB_BUFFER: 0x%p Max Tables: %d\n",
+	printf("Libpayload ARM64: TTB_BUFFER: %p Max Tables: %d\n",
 	       (void*)xlat_addr, max_tables);
 
 	/*
diff --git a/payloads/libpayload/libcbfs/cbfs.c b/payloads/libpayload/libcbfs/cbfs.c
index d2d13eac8e..fda98b92bb 100644
--- a/payloads/libpayload/libcbfs/cbfs.c
+++ b/payloads/libpayload/libcbfs/cbfs.c
@@ -106,7 +106,7 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name)
 	if (stage == NULL)
 		return (void *) -1;
 
-	LOG("loading stage %s @ 0x%p (%d bytes), entry @ 0x%llx\n",
+	LOG("loading stage %s @ %p (%d bytes), entry @ 0x%llx\n",
 			name,
 			(void*)(uintptr_t) stage->load, stage->memlen,
 			stage->entry);
@@ -215,7 +215,7 @@ void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer,
 			       const void *address) {
 	// TODO Add simple buffer management so we can free more than last
 	// allocated one.
-	DEBUG("simple_buffer_unmap(address=0x%p): "
+	DEBUG("simple_buffer_unmap(address=%p): "
 	      "allocated=%zu, size=%zu, last_allocate=%zu\n",
 	    address, buffer->allocated, buffer->size,
 	    buffer->last_allocate);
diff --git a/src/arch/x86/ioapic.c b/src/arch/x86/ioapic.c
index bf2ba6b255..757f7ee0fd 100644
--- a/src/arch/x86/ioapic.c
+++ b/src/arch/x86/ioapic.c
@@ -73,7 +73,7 @@ void set_ioapic_id(void *ioapic_base, u8 ioapic_id)
 	u32 bsp_lapicid = lapicid();
 	int i;
 
-	printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%p\n",
+	printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at %p\n",
 	       ioapic_base);
 	printk(BIOS_DEBUG, "IOAPIC: Bootstrap Processor Local APIC = 0x%02x\n",
 	       bsp_lapicid);
diff --git a/src/commonlib/storage/sdhci.c b/src/commonlib/storage/sdhci.c
index 25c0d6f1eb..6d99508ced 100644
--- a/src/commonlib/storage/sdhci.c
+++ b/src/commonlib/storage/sdhci.c
@@ -722,7 +722,7 @@ static int sdhci_init(struct sdhci_ctrlr *sdhci_ctrlr)
 	if (ctrlr->initialized)
 		return 0;
 
-	sdhc_debug("SDHCI Controller Base Address: 0x%p\n",
+	sdhc_debug("SDHCI Controller Base Address: %p\n",
 			sdhci_ctrlr->ioaddr);
 
 	rv = sdhci_pre_init(sdhci_ctrlr);
diff --git a/src/console/vtxprintf.c b/src/console/vtxprintf.c
index 104f4eaeb3..4045543839 100644
--- a/src/console/vtxprintf.c
+++ b/src/console/vtxprintf.c
@@ -220,10 +220,11 @@ repeat:
 			continue;
 
 		case 'p':
-			if (field_width == -1) {
-				field_width = 2*sizeof(void *);
-				flags |= ZEROPAD;
-			}
+			/* even on 64-bit systems, coreboot only resides in the
+			   low 4GB so pad pointers to 32-bit for readability. */
+			if (field_width == -1 && precision == -1)
+				precision = 2*sizeof(uint32_t);
+			flags |= SPECIAL;
 			count += number(tx_byte,
 				(unsigned long) va_arg(args, void *), 16,
 				field_width, precision, flags, data);
diff --git a/src/device/dram/ddr3.c b/src/device/dram/ddr3.c
index 3f0c0a703e..bef3c78497 100644
--- a/src/device/dram/ddr3.c
+++ b/src/device/dram/ddr3.c
@@ -531,7 +531,7 @@ enum cb_err spd_add_smbios17(const u8 channel, const u8 slot,
 	if (!mem_info) {
 		mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(*mem_info));
 
-		printk(BIOS_DEBUG, "CBMEM entry for DIMM info: 0x%p\n",
+		printk(BIOS_DEBUG, "CBMEM entry for DIMM info: %p\n",
 				mem_info);
 		if (!mem_info)
 			return CB_ERR;
diff --git a/src/device/dram/ddr4.c b/src/device/dram/ddr4.c
index 07f9decb74..4f7e10928c 100644
--- a/src/device/dram/ddr4.c
+++ b/src/device/dram/ddr4.c
@@ -207,7 +207,7 @@ enum cb_err spd_add_smbios17_ddr4(const u8 channel, const u8 slot, const u16 sel
 	if (!mem_info) {
 		mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(*mem_info));
 
-		printk(BIOS_DEBUG, "CBMEM entry for DIMM info: 0x%p\n", mem_info);
+		printk(BIOS_DEBUG, "CBMEM entry for DIMM info: %p\n", mem_info);
 		if (!mem_info)
 			return CB_ERR;
 
diff --git a/src/drivers/elog/elog.c b/src/drivers/elog/elog.c
index 97a9c7fa79..5f11c0c63e 100644
--- a/src/drivers/elog/elog.c
+++ b/src/drivers/elog/elog.c
@@ -329,7 +329,7 @@ static void elog_nv_write(size_t offset, size_t size)
 
 	address = rdev_mmap(rdev, offset, size);
 
-	elog_debug("%s(address=0x%p offset=0x%08zx size=%zu)\n", __func__,
+	elog_debug("%s(address=%p offset=0x%08zx size=%zu)\n", __func__,
 		 address, offset, size);
 
 	if (address == NULL)
diff --git a/src/drivers/generic/ioapic/ioapic.c b/src/drivers/generic/ioapic/ioapic.c
index 74dd941cd7..b16f8c6c26 100644
--- a/src/drivers/generic/ioapic/ioapic.c
+++ b/src/drivers/generic/ioapic/ioapic.c
@@ -32,7 +32,7 @@ static void ioapic_init(struct device *dev)
 	ioapic_base = config->base;
 	ioapic_id = config->apicid;
 
-	printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%p\n",
+	printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at %p\n",
 	       ioapic_base);
 	printk(BIOS_DEBUG, "IOAPIC: Bootstrap Processor Local APIC = 0x%02x\n",
 	       bsp_lapicid);
diff --git a/src/drivers/i2c/designware/dw_i2c.c b/src/drivers/i2c/designware/dw_i2c.c
index eb90387955..9eda827f30 100644
--- a/src/drivers/i2c/designware/dw_i2c.c
+++ b/src/drivers/i2c/designware/dw_i2c.c
@@ -743,7 +743,7 @@ int dw_i2c_init(unsigned int bus, const struct dw_i2c_bus_config *bcfg)
 	/* Enable stop detection interrupt */
 	write32(&regs->intr_mask, INTR_STAT_STOP_DET);
 
-	printk(BIOS_INFO, "DW I2C bus %u at 0x%p (%u KHz)\n",
+	printk(BIOS_INFO, "DW I2C bus %u at %p (%u KHz)\n",
 	       bus, regs, speed / KHz);
 
 	return 0;
diff --git a/src/drivers/intel/fsp1_1/fsp_util.c b/src/drivers/intel/fsp1_1/fsp_util.c
index 2889f3f6fc..b1075ff2b5 100644
--- a/src/drivers/intel/fsp1_1/fsp_util.c
+++ b/src/drivers/intel/fsp1_1/fsp_util.c
@@ -102,22 +102,22 @@ void print_fsp_info(FSP_INFO_HEADER *fsp_header)
 			(u8)(fsp_header->ImageRevision  & 0xff));
 #if CONFIG(DISPLAY_FSP_ENTRY_POINTS)
 	printk(BIOS_SPEW, "FSP Entry Points:\n");
-	printk(BIOS_SPEW, "    0x%p: Image Base\n", fsp_base);
-	printk(BIOS_SPEW, "    0x%p: TempRamInit\n",
+	printk(BIOS_SPEW, "    %p: Image Base\n", fsp_base);
+	printk(BIOS_SPEW, "    %p: TempRamInit\n",
 		&fsp_base[fsp_header->TempRamInitEntryOffset]);
-	printk(BIOS_SPEW, "    0x%p: FspInit\n",
+	printk(BIOS_SPEW, "    %p: FspInit\n",
 		&fsp_base[fsp_header->FspInitEntryOffset]);
 	if (fsp_header->HeaderRevision >= FSP_HEADER_REVISION_2) {
-		printk(BIOS_SPEW, "    0x%p: MemoryInit\n",
+		printk(BIOS_SPEW, "    %p: MemoryInit\n",
 			&fsp_base[fsp_header->FspMemoryInitEntryOffset]);
-		printk(BIOS_SPEW, "    0x%p: TempRamExit\n",
+		printk(BIOS_SPEW, "    %p: TempRamExit\n",
 			&fsp_base[fsp_header->TempRamExitEntryOffset]);
-		printk(BIOS_SPEW, "    0x%p: SiliconInit\n",
+		printk(BIOS_SPEW, "    %p: SiliconInit\n",
 			&fsp_base[fsp_header->FspSiliconInitEntryOffset]);
 	}
-	printk(BIOS_SPEW, "    0x%p: NotifyPhase\n",
+	printk(BIOS_SPEW, "    %p: NotifyPhase\n",
 		&fsp_base[fsp_header->NotifyPhaseEntryOffset]);
-	printk(BIOS_SPEW, "    0x%p: Image End\n",
+	printk(BIOS_SPEW, "    %p: Image End\n",
 			&fsp_base[fsp_header->ImageSize]);
 #endif
 }
diff --git a/src/drivers/intel/fsp1_1/hob.c b/src/drivers/intel/fsp1_1/hob.c
index d6878e3780..679cdf8032 100644
--- a/src/drivers/intel/fsp1_1/hob.c
+++ b/src/drivers/intel/fsp1_1/hob.c
@@ -282,7 +282,7 @@ void print_hob_type_structure(u16 hob_type, void *hob_list_ptr)
 	 * the end of the HOB list
 	 */
 	printk(BIOS_DEBUG, "\n=== FSP HOB Data Structure ===\n");
-	printk(BIOS_DEBUG, "0x%p: hob_list_ptr\n", hob_list_ptr);
+	printk(BIOS_DEBUG, "%p: hob_list_ptr\n", hob_list_ptr);
 	do {
 		EFI_HOB_GENERIC_HEADER *current_header_ptr =
 			(EFI_HOB_GENERIC_HEADER *)current_hob;
diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c
index 59a60cfb83..208ebb5a58 100644
--- a/src/drivers/intel/fsp1_1/raminit.c
+++ b/src/drivers/intel/fsp1_1/raminit.c
@@ -66,10 +66,10 @@ void raminit(struct romstage_params *params)
 	fsp_header = params->chipset_context;
 	vpd_ptr = (VPD_DATA_REGION *)(fsp_header->CfgRegionOffset +
 					fsp_header->ImageBase);
-	printk(BIOS_DEBUG, "VPD Data: 0x%p\n", vpd_ptr);
+	printk(BIOS_DEBUG, "VPD Data: %p\n", vpd_ptr);
 	upd_ptr = (UPD_DATA_REGION *)(vpd_ptr->PcdUpdRegionOffset +
 					fsp_header->ImageBase);
-	printk(BIOS_DEBUG, "UPD Data: 0x%p\n", upd_ptr);
+	printk(BIOS_DEBUG, "UPD Data: %p\n", upd_ptr);
 	original_params = (void *)((u8 *)upd_ptr +
 		upd_ptr->MemoryInitUpdOffset);
 	memcpy(&memory_init_params, original_params,
@@ -110,12 +110,12 @@ void raminit(struct romstage_params *params)
 	/* Call FspMemoryInit to initialize RAM */
 	fsp_memory_init = (FSP_MEMORY_INIT)(fsp_header->ImageBase
 		+ fsp_header->FspMemoryInitEntryOffset);
-	printk(BIOS_DEBUG, "Calling FspMemoryInit: 0x%p\n", fsp_memory_init);
-	printk(BIOS_SPEW, "    0x%p: NvsBufferPtr\n",
+	printk(BIOS_DEBUG, "Calling FspMemoryInit: %p\n", fsp_memory_init);
+	printk(BIOS_SPEW, "    %p: NvsBufferPtr\n",
 		fsp_memory_init_params.NvsBufferPtr);
-	printk(BIOS_SPEW, "    0x%p: RtBufferPtr\n",
+	printk(BIOS_SPEW, "    %p: RtBufferPtr\n",
 		fsp_memory_init_params.RtBufferPtr);
-	printk(BIOS_SPEW, "    0x%p: HobListPtr\n",
+	printk(BIOS_SPEW, "    %p: HobListPtr\n",
 		fsp_memory_init_params.HobListPtr);
 
 	timestamp_add_now(TS_FSP_MEMORY_INIT_START);
@@ -151,7 +151,7 @@ void raminit(struct romstage_params *params)
 	}
 
 	/* Migrate CAR data */
-	printk(BIOS_DEBUG, "0x%p: cbmem_top\n", cbmem_top());
+	printk(BIOS_DEBUG, "%p: cbmem_top\n", cbmem_top());
 	if (!s3wake) {
 		cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
 			fsp_reserved_bytes);
@@ -216,7 +216,7 @@ void raminit(struct romstage_params *params)
 
 	/* Get the address of the CBMEM region for the FSP reserved memory */
 	fsp_reserved_memory_area = cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY);
-	printk(BIOS_DEBUG, "0x%p: fsp_reserved_memory_area\n",
+	printk(BIOS_DEBUG, "%p: fsp_reserved_memory_area\n",
 		fsp_reserved_memory_area);
 
 	/* Verify the order of CBMEM root and FSP memory */
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index 70bedc50af..9ecdfd658a 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -81,10 +81,10 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
 	/* Initialize the UPD values */
 	vpd_ptr = (VPD_DATA_REGION *)(fsp_info_header->CfgRegionOffset +
 					fsp_info_header->ImageBase);
-	printk(BIOS_DEBUG, "0x%p: VPD Data\n", vpd_ptr);
+	printk(BIOS_DEBUG, "%p: VPD Data\n", vpd_ptr);
 	upd_ptr = (UPD_DATA_REGION *)(vpd_ptr->PcdUpdRegionOffset +
 					fsp_info_header->ImageBase);
-	printk(BIOS_DEBUG, "0x%p: UPD Data\n", upd_ptr);
+	printk(BIOS_DEBUG, "%p: UPD Data\n", upd_ptr);
 	original_params = (void *)((u8 *)upd_ptr +
 		upd_ptr->SiliconInitUpdOffset);
 	memcpy(&silicon_init_params, original_params,
@@ -114,7 +114,7 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
 	fsp_silicon_init = (FSP_SILICON_INIT)(fsp_info_header->ImageBase
 		+ fsp_info_header->FspSiliconInitEntryOffset);
 	timestamp_add_now(TS_FSP_SILICON_INIT_START);
-	printk(BIOS_DEBUG, "Calling FspSiliconInit(0x%p) at 0x%p\n",
+	printk(BIOS_DEBUG, "Calling FspSiliconInit(%p) at %p\n",
 		&silicon_init_params, fsp_silicon_init);
 	post_code(POST_FSP_SILICON_INIT);
 	status = fsp_silicon_init(&silicon_init_params);
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index d441ca7008..95148f744b 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -220,7 +220,7 @@ __weak void mainboard_save_dimm_info(
 	 * table 17
 	 */
 	mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(*mem_info));
-	printk(BIOS_DEBUG, "CBMEM entry for DIMM info: 0x%p\n", mem_info);
+	printk(BIOS_DEBUG, "CBMEM entry for DIMM info: %p\n", mem_info);
 	if (mem_info == NULL)
 		return;
 	memset(mem_info, 0, sizeof(*mem_info));
diff --git a/src/drivers/intel/fsp2_0/debug.c b/src/drivers/intel/fsp2_0/debug.c
index 44ad735be2..5fc3b6fc16 100644
--- a/src/drivers/intel/fsp2_0/debug.c
+++ b/src/drivers/intel/fsp2_0/debug.c
@@ -40,9 +40,9 @@ void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,
 	/* Display the call entry point and parameters */
 	if (!CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
 		return;
-	printk(BIOS_SPEW, "Calling FspMemoryInit: 0x%p\n", memory_init);
-	printk(BIOS_SPEW, "\t0x%p: raminit_upd\n", fspm_new_upd);
-	printk(BIOS_SPEW, "\t0x%p: &hob_list_ptr\n", fsp_get_hob_list_ptr());
+	printk(BIOS_SPEW, "Calling FspMemoryInit: %p\n", memory_init);
+	printk(BIOS_SPEW, "\t%p: raminit_upd\n", fspm_new_upd);
+	printk(BIOS_SPEW, "\t%p: &hob_list_ptr\n", fsp_get_hob_list_ptr());
 }
 
 void fsp_debug_after_memory_init(uint32_t status)
@@ -83,8 +83,8 @@ void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init,
 	/* Display the call to FSP SiliconInit */
 	if (!CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
 		return;
-	printk(BIOS_SPEW, "Calling FspSiliconInit: 0x%p\n", silicon_init);
-	printk(BIOS_SPEW, "\t0x%p: upd\n", fsps_new_upd);
+	printk(BIOS_SPEW, "Calling FspSiliconInit: %p\n", silicon_init);
+	printk(BIOS_SPEW, "\t%p: upd\n", fsps_new_upd);
 }
 
 void fsp_debug_after_silicon_init(uint32_t status)
@@ -111,8 +111,8 @@ void fsp_before_debug_notify(fsp_notify_fn notify,
 		return;
 	printk(BIOS_SPEW, "0x%08x: notify_params->phase\n",
 		notify_params->phase);
-	printk(BIOS_SPEW, "Calling FspNotify: 0x%p\n", notify);
-	printk(BIOS_SPEW, "\t0x%p: notify_params\n", notify_params);
+	printk(BIOS_SPEW, "Calling FspNotify: %p\n", notify);
+	printk(BIOS_SPEW, "\t%p: notify_params\n", notify_params);
 }
 
 void fsp_debug_after_notify(uint32_t status)
diff --git a/src/drivers/intel/fsp2_0/hob_display.c b/src/drivers/intel/fsp2_0/hob_display.c
index c4f04aed42..ce6937d123 100644
--- a/src/drivers/intel/fsp2_0/hob_display.c
+++ b/src/drivers/intel/fsp2_0/hob_display.c
@@ -186,12 +186,12 @@ void fsp_display_hobs(void)
 
 	/* Display the HOB list pointer */
 	printk(BIOS_SPEW, "\n=== FSP HOBs ===\n");
-	printk(BIOS_SPEW, "0x%p: hob_list_ptr\n", hob);
+	printk(BIOS_SPEW, "%p: hob_list_ptr\n", hob);
 
 	/* Walk the list of HOBs */
 	while (1) {
 		/* Display the HOB header */
-		printk(BIOS_SPEW, "0x%p, 0x%08x bytes: %s\n", hob, hob->length,
+		printk(BIOS_SPEW, "%p, 0x%08x bytes: %s\n", hob, hob->length,
 			fsp_get_hob_type_name(hob));
 		switch (hob->type) {
 		default:
diff --git a/src/drivers/intel/fsp2_0/hob_verify.c b/src/drivers/intel/fsp2_0/hob_verify.c
index 0c28a9a82d..bdfb64d81a 100644
--- a/src/drivers/intel/fsp2_0/hob_verify.c
+++ b/src/drivers/intel/fsp2_0/hob_verify.c
@@ -56,7 +56,7 @@ void fsp_verify_memory_init_hobs(void)
 	}
 
 	if (range_entry_end(&tolum) != (uintptr_t)cbmem_top()) {
-		printk(BIOS_CRIT, "TOLUM end: 0x%08llx != 0x%p: cbmem_top\n",
+		printk(BIOS_CRIT, "TOLUM end: 0x%08llx != %p: cbmem_top\n",
 			range_entry_end(&tolum), cbmem_top());
 		die("Space between cbmem_top and BIOS TOLUM!\n");
 	}
diff --git a/src/drivers/intel/fsp2_0/temp_ram_exit.c b/src/drivers/intel/fsp2_0/temp_ram_exit.c
index 1dfe1ba7b7..a2171b07ca 100644
--- a/src/drivers/intel/fsp2_0/temp_ram_exit.c
+++ b/src/drivers/intel/fsp2_0/temp_ram_exit.c
@@ -40,7 +40,7 @@ void fsp_temp_ram_exit(void)
 		die("Invalid FSPM header!\n");
 
 	temp_ram_exit = (void *)(hdr.image_base + hdr.temp_ram_exit_entry);
-	printk(BIOS_DEBUG, "Calling TempRamExit: 0x%p\n", temp_ram_exit);
+	printk(BIOS_DEBUG, "Calling TempRamExit: %p\n", temp_ram_exit);
 	status = temp_ram_exit(NULL);
 
 	if (status != FSP_SUCCESS) {
diff --git a/src/drivers/intel/fsp2_0/upd_display.c b/src/drivers/intel/fsp2_0/upd_display.c
index defedab376..6ac52dd8b8 100644
--- a/src/drivers/intel/fsp2_0/upd_display.c
+++ b/src/drivers/intel/fsp2_0/upd_display.c
@@ -32,7 +32,7 @@ static void fspm_display_arch_params(const FSPM_ARCH_UPD *old,
 	const FSPM_ARCH_UPD *new)
 {
 	/* Display the architectural parameters for MemoryInit */
-	printk(BIOS_SPEW, "Architectural UPD values for MemoryInit at: 0x%p\n",
+	printk(BIOS_SPEW, "Architectural UPD values for MemoryInit at: %p\n",
 		new);
 	fsp_display_upd_value("Revision", sizeof(old->Revision),
 		old->Revision, new->Revision);
diff --git a/src/drivers/spi/adesto.c b/src/drivers/spi/adesto.c
index 695bdab2ea..f671247fba 100644
--- a/src/drivers/spi/adesto.c
+++ b/src/drivers/spi/adesto.c
@@ -170,7 +170,7 @@ static int adesto_write(const struct spi_flash *flash, u32 offset, size_t len,
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
 #if CONFIG(DEBUG_SPI_FLASH)
-		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
+		printk(BIOS_SPEW, "PP: %p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		        " chunk_len = %zu\n", buf + actual,
 			cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 #endif
diff --git a/src/drivers/spi/amic.c b/src/drivers/spi/amic.c
index 4943779a1a..9a23d9b527 100644
--- a/src/drivers/spi/amic.c
+++ b/src/drivers/spi/amic.c
@@ -141,7 +141,7 @@ static int amic_write(const struct spi_flash *flash, u32 offset, size_t len,
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
 #if CONFIG(DEBUG_SPI_FLASH)
-		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
+		printk(BIOS_SPEW, "PP: %p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		        " chunk_len = %zu\n", buf + actual,
 			cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 #endif
diff --git a/src/drivers/spi/atmel.c b/src/drivers/spi/atmel.c
index 8f88880ad6..88321f03a2 100644
--- a/src/drivers/spi/atmel.c
+++ b/src/drivers/spi/atmel.c
@@ -125,7 +125,7 @@ static int atmel_write(const struct spi_flash *flash, u32 offset, size_t len,
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
 #if CONFIG(DEBUG_SPI_FLASH)
-		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
+		printk(BIOS_SPEW, "PP: %p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		        " chunk_len = %zu\n", buf + actual,
 			cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 #endif
diff --git a/src/drivers/spi/eon.c b/src/drivers/spi/eon.c
index 5b527d1211..a469fe228a 100644
--- a/src/drivers/spi/eon.c
+++ b/src/drivers/spi/eon.c
@@ -265,7 +265,7 @@ static int eon_write(const struct spi_flash *flash,
 
 #if CONFIG(DEBUG_SPI_FLASH)
 		printk(BIOS_SPEW,
-		    "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
+		    "PP: %p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
 		     buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 #endif
 
diff --git a/src/drivers/spi/gigadevice.c b/src/drivers/spi/gigadevice.c
index 05a73df77c..9afc355336 100644
--- a/src/drivers/spi/gigadevice.c
+++ b/src/drivers/spi/gigadevice.c
@@ -194,7 +194,7 @@ static int gigadevice_write(const struct spi_flash *flash, u32 offset,
 		cmd[3] = offset & 0xff;
 #if CONFIG(DEBUG_SPI_FLASH)
 		printk(BIOS_SPEW,
-		       "PP gigadevice.c: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
+		       "PP gigadevice.c: %p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		       " chunk_len = %zu\n", buf + actual,
 		       cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 #endif
diff --git a/src/drivers/spi/macronix.c b/src/drivers/spi/macronix.c
index 25784b4dc3..29489ee235 100644
--- a/src/drivers/spi/macronix.c
+++ b/src/drivers/spi/macronix.c
@@ -222,7 +222,7 @@ static int macronix_write(const struct spi_flash *flash, u32 offset, size_t len,
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
 #if CONFIG(DEBUG_SPI_FLASH)
-		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
+		printk(BIOS_SPEW, "PP: %p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		     " chunk_len = %zu\n",
 		     buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 #endif
diff --git a/src/drivers/spi/spansion.c b/src/drivers/spi/spansion.c
index cee93b2ac6..cb665d0a59 100644
--- a/src/drivers/spi/spansion.c
+++ b/src/drivers/spi/spansion.c
@@ -241,7 +241,7 @@ static int spansion_write(const struct spi_flash *flash, u32 offset, size_t len,
 		cmd[3] = offset & 0xff;
 
 #if CONFIG(DEBUG_SPI_FLASH)
-		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
+		printk(BIOS_SPEW, "PP: %p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		     " chunk_len = %zu\n",
 		     buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 #endif
diff --git a/src/drivers/spi/sst.c b/src/drivers/spi/sst.c
index 348d06c3e8..5367b70d21 100644
--- a/src/drivers/spi/sst.c
+++ b/src/drivers/spi/sst.c
@@ -171,7 +171,7 @@ sst_byte_write(const struct spi_flash *flash, u32 offset, const void *buf)
 	};
 
 #if CONFIG(DEBUG_SPI_FLASH)
-	printk(BIOS_SPEW, "BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
+	printk(BIOS_SPEW, "BP[%02x]: %p => cmd = { 0x%02x 0x%06x }\n",
 		spi_w8r8(&flash->spi, CMD_SST_RDSR), buf, cmd[0], offset);
 #endif
 
@@ -225,7 +225,7 @@ static int sst_write_256(const struct spi_flash *flash, u32 offset, size_t len,
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
 #if CONFIG(DEBUG_SPI_FLASH)
-		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
+		printk(BIOS_SPEW, "PP: %p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		     " chunk_len = %zu\n",
 		     buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 #endif
@@ -287,7 +287,7 @@ static int sst_write_ai(const struct spi_flash *flash, u32 offset, size_t len,
 
 	for (; actual < len - 1; actual += 2) {
 #if CONFIG(DEBUG_SPI_FLASH)
-		printk(BIOS_SPEW, "WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
+		printk(BIOS_SPEW, "WP[%02x]: %p => cmd = { 0x%02x 0x%06x }\n",
 		     spi_w8r8(&flash->spi, CMD_SST_RDSR), buf + actual, cmd[0],
 		     offset);
 #endif
diff --git a/src/drivers/spi/stmicro.c b/src/drivers/spi/stmicro.c
index ddff859d38..d397e6e669 100644
--- a/src/drivers/spi/stmicro.c
+++ b/src/drivers/spi/stmicro.c
@@ -306,7 +306,7 @@ static int stmicro_write(const struct spi_flash *flash,
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
 #if CONFIG(DEBUG_SPI_FLASH)
-		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
+		printk(BIOS_SPEW, "PP: %p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		     " chunk_len = %zu\n",
 		     buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 #endif
diff --git a/src/drivers/spi/winbond.c b/src/drivers/spi/winbond.c
index 9e451171e5..432ad6a47e 100644
--- a/src/drivers/spi/winbond.c
+++ b/src/drivers/spi/winbond.c
@@ -318,7 +318,7 @@ static int winbond_write(const struct spi_flash *flash, u32 offset, size_t len,
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
 #if CONFIG(DEBUG_SPI_FLASH)
-		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
+		printk(BIOS_SPEW, "PP: %p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		        " chunk_len = %zu\n", buf + actual,
 			cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 #endif
diff --git a/src/drivers/xgi/common/xgi_coreboot.c b/src/drivers/xgi/common/xgi_coreboot.c
index caeb59d749..d65e007a2a 100644
--- a/src/drivers/xgi/common/xgi_coreboot.c
+++ b/src/drivers/xgi/common/xgi_coreboot.c
@@ -126,13 +126,13 @@ int xgifb_probe(struct pci_dev *pdev, struct xgifb_video_info *xgifb_info)
 	xgifb_info->mmio_vbase = (void *)(intptr_t)xgifb_info->mmio_base;
 
 	dev_info(&pdev->dev,
-		 "Framebuffer at 0x%Lx, mapped to 0x%p, size %dk\n",
+		 "Framebuffer at 0x%Lx, mapped to %p, size %dk\n",
 		 (u64) xgifb_info->video_base,
 		 xgifb_info->video_vbase,
 		 xgifb_info->video_size / 1024);
 
 	dev_info(&pdev->dev,
-		 "MMIO at 0x%Lx, mapped to 0x%p, size %ldk\n",
+		 "MMIO at 0x%Lx, mapped to %p, size %ldk\n",
 		 (u64) xgifb_info->mmio_base, xgifb_info->mmio_vbase,
 		 xgifb_info->mmio_size / 1024);
 
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index af9f6599c5..e42cb3bdd2 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -476,7 +476,7 @@ size_t write_coreboot_forwarding_table(uintptr_t entry, uintptr_t target)
 {
 	struct lb_header *head;
 
-	printk(BIOS_DEBUG, "Writing table forward entry at 0x%p\n",
+	printk(BIOS_DEBUG, "Writing table forward entry at %p\n",
 		(void *)entry);
 
 	head = lb_table_init(entry);
diff --git a/src/lib/imd.c b/src/lib/imd.c
index b5fc34a9a0..4fa8f7023b 100644
--- a/src/lib/imd.c
+++ b/src/lib/imd.c
@@ -687,7 +687,7 @@ static void imdr_print_entries(const struct imdr *imdr, const char *indent,
 			printk(BIOS_DEBUG, "%s", name);
 		printk(BIOS_DEBUG, "%2zu. ", i);
 		printk(BIOS_DEBUG, "%p ", imdr_entry_at(imdr, e));
-		printk(BIOS_DEBUG, "%08zx\n", imdr_entry_size(imdr, e));
+		printk(BIOS_DEBUG, "0x%08zx\n", imdr_entry_size(imdr, e));
 	}
 }
 
diff --git a/src/lib/rmodule.c b/src/lib/rmodule.c
index 56529d2fb2..96cee8aad3 100644
--- a/src/lib/rmodule.c
+++ b/src/lib/rmodule.c
@@ -278,7 +278,7 @@ int rmodule_stage_load(struct rmod_stage_load *rsl)
 
 	rmod_loc = &stage_region[rmodule_offset];
 
-	printk(BIOS_INFO, "Decompressing stage %s @ 0x%p (%d bytes)\n",
+	printk(BIOS_INFO, "Decompressing stage %s @ %p (%d bytes)\n",
 	       prog_name(rsl->prog), rmod_loc, stage.memlen);
 
 	if (!cbfs_load_and_decompress(fh, sizeof(stage), stage.len, rmod_loc,
diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c
index a0bb711f8a..8cf7a6ff57 100644
--- a/src/lib/selfboot.c
+++ b/src/lib/selfboot.c
@@ -56,7 +56,7 @@ static int segment_targets_type(void *dest, unsigned long memsz,
 	if (payload_arch_usable_ram_quirk(d, memsz))
 		return 1;
 
-	printk(BIOS_ERR, "SELF segment doesn't target RAM: 0x%p, %lu bytes\n", dest, memsz);
+	printk(BIOS_ERR, "SELF segment doesn't target RAM: %p, %lu bytes\n", dest, memsz);
 	bootmem_dump_ranges();
 	return 0;
 }
@@ -69,7 +69,7 @@ static int load_one_segment(uint8_t *dest,
 			    int flags)
 {
 		unsigned char *middle, *end;
-		printk(BIOS_DEBUG, "Loading Segment: addr: 0x%p memsz: 0x%016zx filesz: 0x%016zx\n",
+		printk(BIOS_DEBUG, "Loading Segment: addr: %p memsz: 0x%016zx filesz: 0x%016zx\n",
 		       dest, memsz, len);
 
 		/* Compute the boundaries of the segment */
@@ -150,7 +150,7 @@ static int check_payload_segments(struct cbfs_payload_segment *cbfssegs,
 	enum bootmem_type dest_type = *(enum bootmem_type *)args;
 
 	for (seg = cbfssegs;; ++seg) {
-		printk(BIOS_DEBUG, "Checking segment from ROM address 0x%p\n", seg);
+		printk(BIOS_DEBUG, "Checking segment from ROM address %p\n", seg);
 		cbfs_decode_payload_segment(&segment, seg);
 		dest = (uint8_t *)(uintptr_t)segment.load_addr;
 		memsz = segment.mem_len;
@@ -171,7 +171,7 @@ static int load_payload_segments(struct cbfs_payload_segment *cbfssegs, uintptr_
 	int flags = 0;
 
 	for (first_segment = seg = cbfssegs;; ++seg) {
-		printk(BIOS_DEBUG, "Loading segment from ROM address 0x%p\n", seg);
+		printk(BIOS_DEBUG, "Loading segment from ROM address %p\n", seg);
 
 		cbfs_decode_payload_segment(&segment, seg);
 		dest = (uint8_t *)(uintptr_t)segment.load_addr;
@@ -187,7 +187,7 @@ static int load_payload_segments(struct cbfs_payload_segment *cbfssegs, uintptr_
 				?  "code" : "data", segment.compression);
 			src = ((uint8_t *)first_segment) + segment.offset;
 			printk(BIOS_DEBUG,
-				"  New segment dstaddr 0x%p memsize 0x%zx srcaddr 0x%p filesize 0x%zx\n",
+				"  New segment dstaddr %p memsize 0x%zx srcaddr %p filesize 0x%zx\n",
 			       dest, memsz, src, filesz);
 
 			/* Clean up the values */
@@ -198,7 +198,7 @@ static int load_payload_segments(struct cbfs_payload_segment *cbfssegs, uintptr_
 			break;
 
 		case PAYLOAD_SEGMENT_BSS:
-			printk(BIOS_DEBUG, "  BSS 0x%p (%d byte)\n", (void *)
+			printk(BIOS_DEBUG, "  BSS %p (%d byte)\n", (void *)
 				(intptr_t)segment.load_addr, segment.mem_len);
 			filesz = 0;
 			src = ((uint8_t *)first_segment) + segment.offset;
@@ -206,7 +206,7 @@ static int load_payload_segments(struct cbfs_payload_segment *cbfssegs, uintptr_
 			break;
 
 		case PAYLOAD_SEGMENT_ENTRY:
-			printk(BIOS_DEBUG, "  Entry Point 0x%p\n", (void *)
+			printk(BIOS_DEBUG, "  Entry Point %p\n", (void *)
 				(intptr_t)segment.load_addr);
 
 			*entry = segment.load_addr;
diff --git a/src/lib/trace.c b/src/lib/trace.c
index b11881760d..826fa3b671 100644
--- a/src/lib/trace.c
+++ b/src/lib/trace.c
@@ -26,7 +26,7 @@ void __cyg_profile_func_enter(void *func, void *callsite)
 		return;
 
 	DISABLE_TRACE
-	printk(BIOS_INFO, "~0x%p(0x%p)\n", func, callsite);
+	printk(BIOS_INFO, "~%p(%p)\n", func, callsite);
 	ENABLE_TRACE
 }
 
diff --git a/src/mainboard/google/cyan/spd/spd.c b/src/mainboard/google/cyan/spd/spd.c
index f73b9e6539..8dd4366ad0 100644
--- a/src/mainboard/google/cyan/spd/spd.c
+++ b/src/mainboard/google/cyan/spd/spd.c
@@ -191,7 +191,7 @@ void mainboard_save_dimm_info(struct romstage_params *params)
 	 * table 17
 	 */
 	mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(*mem_info));
-	printk(BIOS_DEBUG, "CBMEM entry for DIMM info: 0x%p\n", mem_info);
+	printk(BIOS_DEBUG, "CBMEM entry for DIMM info: %p\n", mem_info);
 	if (mem_info == NULL)
 		return;
 	memset(mem_info, 0, sizeof(*mem_info));
diff --git a/src/soc/amd/common/block/pi/def_callouts.c b/src/soc/amd/common/block/pi/def_callouts.c
index 299a98abe9..facd5f8c0f 100644
--- a/src/soc/amd/common/block/pi/def_callouts.c
+++ b/src/soc/amd/common/block/pi/def_callouts.c
@@ -198,7 +198,7 @@ static void callout_ap_entry(void *unused)
 {
 	AGESA_STATUS Status = AGESA_UNSUPPORTED;
 
-	printk(BIOS_DEBUG, "%s Func: 0x%x,  Data: 0x%lx, Ptr: 0x%p\n",
+	printk(BIOS_DEBUG, "%s Func: 0x%x,  Data: 0x%lx, Ptr: %p\n",
 		__func__, agesadata.Func, agesadata.Data, agesadata.ConfigPtr);
 
 	/* Check if this AP should run the function */
diff --git a/src/soc/amd/common/block/s3/s3_resume.c b/src/soc/amd/common/block/s3/s3_resume.c
index 598036acf2..a0de406d38 100644
--- a/src/soc/amd/common/block/s3/s3_resume.c
+++ b/src/soc/amd/common/block/s3/s3_resume.c
@@ -58,7 +58,7 @@ AGESA_STATUS OemInitResume(S3_DATA_BLOCK *dataBlock)
 
 	dataBlock->NvStorage = base;
 	dataBlock->NvStorageSize = size;
-	printk(BIOS_SPEW, "S3 NV data @0x%p, 0x%0zx bytes\n",
+	printk(BIOS_SPEW, "S3 NV data @%p, 0x%0zx bytes\n",
 		dataBlock->NvStorage, (size_t)dataBlock->NvStorageSize);
 
 	return AGESA_SUCCESS;
@@ -77,7 +77,7 @@ AGESA_STATUS OemS3LateRestore(S3_DATA_BLOCK *dataBlock)
 
 	dataBlock->VolatileStorage = base;
 	dataBlock->VolatileStorageSize = size;
-	printk(BIOS_SPEW, "S3 volatile data @0x%p, 0x%0zx bytes\n",
+	printk(BIOS_SPEW, "S3 volatile data @%p, 0x%0zx bytes\n",
 		dataBlock->VolatileStorage, (size_t)dataBlock->VolatileStorageSize);
 
 	return AGESA_SUCCESS;
diff --git a/src/soc/amd/common/block/spi/fch_spi_flash.c b/src/soc/amd/common/block/spi/fch_spi_flash.c
index 40dd0e2996..72bc5d6ea5 100644
--- a/src/soc/amd/common/block/spi/fch_spi_flash.c
+++ b/src/soc/amd/common/block/spi/fch_spi_flash.c
@@ -200,7 +200,7 @@ static int fch_spi_flash_write(const struct spi_flash *flash, uint32_t offset, s
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
 #if CONFIG(SOC_AMD_COMMON_BLOCK_SPI_DEBUG)
-		printk(BIOS_DEBUG, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu"
+		printk(BIOS_DEBUG, "PP: %p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu"
 				"\n", buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 #endif
 
diff --git a/src/soc/amd/common/block/spi/fch_spi_special.c b/src/soc/amd/common/block/spi/fch_spi_special.c
index fa3c00ac84..27bea05143 100644
--- a/src/soc/amd/common/block/spi/fch_spi_special.c
+++ b/src/soc/amd/common/block/spi/fch_spi_special.c
@@ -56,7 +56,7 @@ int non_standard_sst_write_aai(u32 offset, size_t len, const void *buf, size_t s
 
 	for (actual = start; actual < len - 1; actual += 2) {
 #if CONFIG(SOC_AMD_COMMON_BLOCK_SPI_DEBUG)
-		printk(BIOS_DEBUG, "PP: 0x%p => cmd = { 0x%02x 0x%06lx }"
+		printk(BIOS_DEBUG, "PP: %p => cmd = { 0x%02x 0x%06lx }"
 		     " chunk_len = 2\n",
 		     buf + actual, cmd[0], (offset + actual));
 #endif
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index 8b13fd0e82..b2d13d5642 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -618,7 +618,7 @@ static void finalize_chipset(void *unused)
 	uint8_t *spi = (uint8_t *)SPI_BASE_ADDRESS;
 	struct vscc_config cfg;
 
-	printk(BIOS_SPEW, "%s/%s (0x%p)\n",
+	printk(BIOS_SPEW, "%s/%s (%p)\n",
 			__FILE__, __func__, unused);
 
 	/* Set the lock enable on the BIOS control register. */
diff --git a/src/soc/intel/common/mma.c b/src/soc/intel/common/mma.c
index 1b3a82a088..2cd35ea6cd 100644
--- a/src/soc/intel/common/mma.c
+++ b/src/soc/intel/common/mma.c
@@ -219,7 +219,7 @@ static void save_mma_results_data(void *unused)
 	memset(mma_data, 0, mma_data_size);
 
 	printk(BIOS_DEBUG,
-		"MMA: copy MMA data to CBMEM(src 0x%p, dest 0x%p, %u bytes)\n",
+		"MMA: copy MMA data to CBMEM(src %p, dest %p, %u bytes)\n",
 			mma_hob, mma_data, mma_hob_size);
 
 	mma_data->mma_signature = MMA_DATA_SIGNATURE;
diff --git a/src/soc/intel/denverton_ns/hob_mem.c b/src/soc/intel/denverton_ns/hob_mem.c
index e4aa78f291..a00a4f498c 100644
--- a/src/soc/intel/denverton_ns/hob_mem.c
+++ b/src/soc/intel/denverton_ns/hob_mem.c
@@ -52,7 +52,7 @@ void soc_save_dimm_info(void)
 	 * table 17
 	 */
 	mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(*mem_info));
-	printk(BIOS_DEBUG, "CBMEM entry for DIMM info: 0x%p\n", mem_info);
+	printk(BIOS_DEBUG, "CBMEM entry for DIMM info: %p\n", mem_info);
 	if (mem_info == NULL)
 		return;
 	memset(mem_info, 0, sizeof(*mem_info));
diff --git a/src/soc/intel/quark/bootblock/bootblock.c b/src/soc/intel/quark/bootblock/bootblock.c
index 2b2fc29f59..957b4a0c37 100644
--- a/src/soc/intel/quark/bootblock/bootblock.c
+++ b/src/soc/intel/quark/bootblock/bootblock.c
@@ -118,6 +118,6 @@ void bootblock_soc_init(void)
 void platform_prog_run(struct prog *prog)
 {
 	/* Display the program entry point */
-	printk(BIOS_SPEW, "Calling %s, 0x%p(0x%p)\n", prog->name,
+	printk(BIOS_SPEW, "Calling %s, %p(%p)\n", prog->name,
 		prog->entry, prog->arg);
 }
diff --git a/src/soc/intel/quark/i2c.c b/src/soc/intel/quark/i2c.c
index b09852bc3f..7ff2ddf93f 100644
--- a/src/soc/intel/quark/i2c.c
+++ b/src/soc/intel/quark/i2c.c
@@ -209,7 +209,7 @@ int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segment,
 			if (index == 0)
 				printk(BIOS_ERR, "I2C Start\n");
 			printk(BIOS_ERR,
-				"I2C segment[%d]: %s 0x%02x %s 0x%p, 0x%08x bytes\n",
+				"I2C segment[%d]: %s 0x%02x %s %p, 0x%08x bytes\n",
 				index,
 				(segment[index].flags & I2C_M_RD) ? "Read from" : "Write to",
 				segment[index].slave,
diff --git a/src/soc/intel/quark/romstage/debug.c b/src/soc/intel/quark/romstage/debug.c
index 1029eadb93..e0cf6c8262 100644
--- a/src/soc/intel/quark/romstage/debug.c
+++ b/src/soc/intel/quark/romstage/debug.c
@@ -26,7 +26,7 @@ void soc_display_fspm_upd_params(const FSPM_UPD *fspm_old_upd,
 	new = &fspm_new_upd->FspmConfig;
 
 	/* Display the parameters for MemoryInit */
-	printk(BIOS_SPEW, "UPD values for MemoryInit at: 0x%p\n", new);
+	printk(BIOS_SPEW, "UPD values for MemoryInit at: %p\n", new);
 	fsp_display_upd_value("AddrMode", sizeof(old->AddrMode),
 		old->AddrMode, new->AddrMode);
 	fsp_display_upd_value("ChanMask", sizeof(old->ChanMask),
diff --git a/src/soc/intel/quark/romstage/fsp_params.c b/src/soc/intel/quark/romstage/fsp_params.c
index 681e126a13..c31cafb14f 100644
--- a/src/soc/intel/quark/romstage/fsp_params.c
+++ b/src/soc/intel/quark/romstage/fsp_params.c
@@ -111,13 +111,13 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *fspm_upd, uint32_t version)
 			"+-------------------+ 0x%08x (CONFIG_FSP_ESRAM_LOC)\n",
 			CONFIG_FSP_ESRAM_LOC);
 		printk(BIOS_SPEW, "| FSP stack         |\n");
-		printk(BIOS_SPEW, "+-------------------+ 0x%p\n",
+		printk(BIOS_SPEW, "+-------------------+ %p\n",
 			aupd->StackBase);
 		printk(BIOS_SPEW, "|                   |\n");
-		printk(BIOS_SPEW, "+-------------------+ 0x%p\n",
+		printk(BIOS_SPEW, "+-------------------+ %p\n",
 			_car_unallocated_start);
 		printk(BIOS_SPEW, "| coreboot data     |\n");
-		printk(BIOS_SPEW, "+-------------------+ 0x%p\n",
+		printk(BIOS_SPEW, "+-------------------+ %p\n",
 			_ecar_stack);
 		printk(BIOS_SPEW, "| coreboot stack    |\n");
 		printk(BIOS_SPEW,
diff --git a/src/soc/qualcomm/ipq40xx/qup.c b/src/soc/qualcomm/ipq40xx/qup.c
index 9a206fc6a9..1775c84628 100644
--- a/src/soc/qualcomm/ipq40xx/qup.c
+++ b/src/soc/qualcomm/ipq40xx/qup.c
@@ -47,7 +47,7 @@
 #if QUP_DEBUG
 #define qup_write32(a, v) do {				\
 	write32(a, v);					\
-	printk(QUPDBG "%s(%d): write32(0x%p, 0x%x)\n",	\
+	printk(QUPDBG "%s(%d): write32(%p, 0x%x)\n",	\
 			__func__, __LINE__, a, v);	\
 } while (0)
 #else
diff --git a/src/soc/qualcomm/qcs405/qup.c b/src/soc/qualcomm/qcs405/qup.c
index cff5241480..6e84bcb2ff 100644
--- a/src/soc/qualcomm/qcs405/qup.c
+++ b/src/soc/qualcomm/qcs405/qup.c
@@ -48,7 +48,7 @@
 #if QUP_DEBUG
 #define qup_write32(a, v) do {				\
 	write32(a, v);					\
-	printk(QUPDBG "%s(%d): write32(0x%p, 0x%x)\n",	\
+	printk(QUPDBG "%s(%d): write32(%p, 0x%x)\n",	\
 			__func__, __LINE__, a, v);	\
 } while (0)
 #else
diff --git a/src/vendorcode/google/chromeos/ramoops.c b/src/vendorcode/google/chromeos/ramoops.c
index 7eef2d1338..9ea112a5c4 100644
--- a/src/vendorcode/google/chromeos/ramoops.c
+++ b/src/vendorcode/google/chromeos/ramoops.c
@@ -32,7 +32,7 @@ static void set_ramoops(chromeos_acpi_t *chromeos, void *ram_oops, size_t size)
 		return;
 	}
 
-	printk(BIOS_DEBUG, "Ramoops buffer: 0x%zx@0x%p.\n", size, ram_oops);
+	printk(BIOS_DEBUG, "Ramoops buffer: 0x%zx@%p.\n", size, ram_oops);
 	chromeos->ramoops_base = (uintptr_t)ram_oops;
 	chromeos->ramoops_len = size;
 }