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authorMatt DeVillier <matt.devillier@puri.sm>2020-05-01 12:48:54 -0500
committerPatrick Georgi <pgeorgi@google.com>2020-05-04 18:52:47 +0000
commit5086ccef19a21bb836c6c11bb3f4fb8f993d3bc2 (patch)
treee16524de18b959c05ce662d6e8ed2654af21ba91
parent939cabfae43661b75fb109bd8f280aee0a99ec7e (diff)
mb/purism/librem_skl: Fix CLKREQ for 15v3 NVMe
Per the schematics, SRCCLKREQ2# is used for the NVMe and should be enabled. Enable CLKREQ for PCIe RP9, and adjust comments to indicate correct value used per schematic. Test: build/boot Librem 15v3 with NVMe drive, verify drive identified properly and no errors in boot log. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Change-Id: I159cb7ce1f5195d95c0229490c3bbde26edbd375 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40950 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
index d273462c97..ceeeb431a7 100644
--- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
@@ -167,8 +167,8 @@ chip soc/intel/skylake
register "PcieRpEnable[4]" = "1"
register "PcieRpEnable[8]" = "1"
# Enable CLKREQ# for RP9
- register "PcieRpClkReqSupport[8]" = "0"
- # ClkReq for NVMe - Bruteforced (no other value works)
+ register "PcieRpClkReqSupport[8]" = "1"
+ # SRCCLKREQ2# for NVMe per schematic
register "PcieRpClkReqNumber[8]" = "2"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C Port