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authorLean Sheng Tan <sheng.tan@9elements.com>2023-03-13 14:55:19 +0100
committerLean Sheng Tan <sheng.tan@9elements.com>2023-03-15 14:25:21 +0000
commit4c5b3f1ce7b03d3fd20cb471b43d45752cb14060 (patch)
treede7b6b4e09206bfb782a1d9dd87b66f5ff05f21c
parent86152453499c8eee7044078411aa0495eef72a38 (diff)
soc/intel/coffeelake: Select `X86_CLFLUSH_CAR` config
This patch selects `X86_CLFLUSH_CAR` config for running `clflush` to invalidate the cache region based on commit 3134a81 for boot performance improvement. Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com> Change-Id: Icd3d16ab2cb34dc81fc12ec139c52ecaa170528d Reviewed-on: https://review.coreboot.org/c/coreboot/+/73686 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/cannonlake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index a54ef90ab6..c4855da7ff 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -119,6 +119,7 @@ config CPU_SPECIFIC_OPTIONS
select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM
select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT
select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE
+ select X86_CLFLUSH_CAR
config MAX_CPUS
int