diff options
| author | Shuo Liu <shuo.liu@intel.com> | 2024-10-22 04:08:11 +0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-10-23 10:30:26 +0000 |
| commit | 495b705137b2efe9cb5c304d0471b836aa296c98 (patch) | |
| tree | d6c18000a37677f2aeddb19d8497d0e95521ae32 | |
| parent | 1c088e6d620e2255d506d718b45afa5d48ecdff5 (diff) | |
configs/builder: Update PBP path for Gen6 Xeon-SP boards
Gen6 Xeon-SP boards needs to be provided with platform boot policy
blob.
Change-Id: I22b944ab6bcb2b9d0797833c06410bdc523e2709
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84820
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
| -rw-r--r-- | Documentation/soc/intel/xeon_sp/community_preview_guide.md | 1 | ||||
| -rw-r--r-- | configs/builder/config.intel.crb.avc | 2 | ||||
| -rw-r--r-- | configs/builder/config.intel.crb.bnc | 2 |
3 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/soc/intel/xeon_sp/community_preview_guide.md b/Documentation/soc/intel/xeon_sp/community_preview_guide.md index 6a32b4fd8b..96ff86fc09 100644 --- a/Documentation/soc/intel/xeon_sp/community_preview_guide.md +++ b/Documentation/soc/intel/xeon_sp/community_preview_guide.md @@ -140,6 +140,7 @@ https://review.coreboot.org/admin/repos/intel-dev-pub,branches # https://cdrdv2-public.intel.com/736809/736809_FSP_EAS_v2.4_Errata_A.pdf CONFIG_IFD_BIN_PATH=<path of intel flash descriptor blob> +CONFIG_PBP_BIN_PATH=<path of platform boot policy blob> CONFIG_CPU_UCODE_BINARIES=<path of ucode> CONFIG_FSP_T_FILE=<path of FSP-T binary> CONFIG_FSP_M_FILE=<path of FSP-M binary> diff --git a/configs/builder/config.intel.crb.avc b/configs/builder/config.intel.crb.avc index eadcaf2cd8..e547c4148f 100644 --- a/configs/builder/config.intel.crb.avc +++ b/configs/builder/config.intel.crb.avc @@ -13,6 +13,7 @@ CONFIG_CONFIGURABLE_RAMSTAGE=y CONFIG_NO_GFX_INIT=y CONFIG_HAVE_IFD_BIN=y +CONFIG_HAVE_PBP_BIN=y CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y CONFIG_ADD_FSP_BINARIES=y @@ -25,6 +26,7 @@ CONFIG_CONSOLE_SERIAL_115200=y # [RW] IFWI Ingredients # CONFIG_IFD_BIN_PATH="site-local/avenuecity/descriptor.bin" +CONFIG_PBP_BIN_PATH="site-local/avenuecity/pbp.bin" CONFIG_CPU_UCODE_BINARIES="site-local/avenuecity/ucode.mcb" CONFIG_FSP_T_FILE="site-local/avenuecity/Server_T.fd" CONFIG_FSP_M_FILE="site-local/avenuecity/Server_M.fd" diff --git a/configs/builder/config.intel.crb.bnc b/configs/builder/config.intel.crb.bnc index 843940c2e7..a4ffaf7f29 100644 --- a/configs/builder/config.intel.crb.bnc +++ b/configs/builder/config.intel.crb.bnc @@ -13,6 +13,7 @@ CONFIG_CONFIGURABLE_RAMSTAGE=y CONFIG_NO_GFX_INIT=y CONFIG_HAVE_IFD_BIN=y +CONFIG_HAVE_PBP_BIN=y CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y CONFIG_ADD_FSP_BINARIES=y @@ -25,6 +26,7 @@ CONFIG_CONSOLE_SERIAL_115200=y # [RW] IFWI Ingredients # CONFIG_IFD_BIN_PATH="site-local/beechnutcity/descriptor.bin" +CONFIG_PBP_BIN_PATH="site-local/beechnutcity/pbp.bin" CONFIG_CPU_UCODE_BINARIES="site-local/beechnutcity/ucode.mcb" CONFIG_FSP_T_FILE="site-local/beechnutcity/Server_T.fd" CONFIG_FSP_M_FILE="site-local/beechnutcity/Server_M.fd" |