soc/intel/alderlake: Generate LP4x SPD files using gen_spd.go

This change uses gen_spd.go and global_lp4x_mem_parts.json.txt to
generate SPD files for currently known LP4x memory parts that can be
used with ADL-based mainboards.

BUG=b:176491791

Change-Id: Ie75e43833bf9ba6557fc59cf8b4a0358d495e56a
Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49919
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

6 files changed, 179 insertions, 0 deletions

diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-1.hex b/src/soc/intel/alderlake/spd/lp4x-spd-1.hex
new file mode 100644
index 0000000000..3fc750507b
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x-spd-1.hex
@@ -0,0 +1,32 @@
+23 11 11 0E 15 21 94 08 00 00 00 00 02 01 00 00
+00 00 04 FF 92 54 05 00 87 00 90 A8 90 C0 08 60
+04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 E5 00 E0 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-2.hex b/src/soc/intel/alderlake/spd/lp4x-spd-2.hex
new file mode 100644
index 0000000000..7995d4c652
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x-spd-2.hex
@@ -0,0 +1,32 @@
+23 11 11 0E 16 29 B8 08 00 00 00 00 09 01 00 00
+00 00 04 FF 12 29 15 00 96 00 90 A8 90 C0 08 60
+04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-3.hex b/src/soc/intel/alderlake/spd/lp4x-spd-3.hex
new file mode 100644
index 0000000000..d4cf7efdfd
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x-spd-3.hex
@@ -0,0 +1,32 @@
+23 11 11 0E 15 21 B4 08 00 00 00 00 0A 01 00 00
+00 00 04 FF 92 54 05 00 87 00 90 A8 90 C0 08 60
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+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-4.hex b/src/soc/intel/alderlake/spd/lp4x-spd-4.hex
new file mode 100644
index 0000000000..c4e5b503b1
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x-spd-4.hex
@@ -0,0 +1,32 @@
+23 11 11 0E 16 29 94 08 00 00 00 00 02 01 00 00
+00 00 04 FF 92 54 05 00 87 00 90 A8 90 E0 0B F0
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+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
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+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-5.hex b/src/soc/intel/alderlake/spd/lp4x-spd-5.hex
new file mode 100644
index 0000000000..e31337d5fc
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x-spd-5.hex
@@ -0,0 +1,32 @@
+23 11 11 0E 14 19 94 08 00 00 00 00 02 01 00 00
+00 00 05 0A 80 54 01 00 89 00 90 A8 90 A0 05 D0
+02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt b/src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt
new file mode 100644
index 0000000000..f09a27f7f7
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt
@@ -0,0 +1,19 @@
+H9HCNNNBKMMLXR-NEE,lp4x-spd-1.hex
+H9HCNNNFAMMLXR-NEE,lp4x-spd-2.hex
+K4U6E3S4AA-MGCL,lp4x-spd-1.hex
+K4UBE3D4AA-MGCL,lp4x-spd-3.hex
+MT53E1G32D2NP-046 WT:A,lp4x-spd-4.hex
+H9HKNNNCRMBVAR-NEH,lp4x-spd-1.hex
+MT53E1G64D4SQ-046 WT:A,lp4x-spd-4.hex
+MT53E512M32D2NP-046 WT:F,lp4x-spd-1.hex
+NT6AP256T32AV-J2,lp4x-spd-5.hex
+K4U6E3S4AA-MGCR,lp4x-spd-1.hex
+MT53E512M32D2NP-046 WT:E,lp4x-spd-1.hex
+H9HCNNNCPMMLXR-NEE,lp4x-spd-3.hex
+K4UBE3D4AA-MGCR,lp4x-spd-3.hex
+MT53E512M64D4NW-046 WT:E,lp4x-spd-1.hex
+MT53E1G64D8NW-046 WT:E,lp4x-spd-3.hex
+H9HCNNNCRMBLPR-NEE,lp4x-spd-1.hex
+H9HCNNNFBMBLPR-NEE,lp4x-spd-3.hex
+MT53D1G64D4NW-046 WT:A,lp4x-spd-4.hex
+MT53D512M64D4NW-046 WT:F,lp4x-spd-1.hex