diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-11-26 14:53:13 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-06-02 05:49:15 +0000 |
| commit | 46e93f91af6b4b031b132960fa4892d125e112a7 (patch) | |
| tree | 447b8fe1d2f75c6266899ba1838ee1ab72e3a5ca | |
| parent | e771b9a65fe668bd04dd8dbdab8af4819a987d95 (diff) | |
nb/intel/i440bx: Use PARALLEL_MP
The ramstage size is decreased by roughly 5K, but the compressed size
increased by ~1K.
Change-Id: Ic8d2582b353069eecea8561cfe01b2dd8221779b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59693
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/northbridge/intel/i440bx/Kconfig | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/i440bx/northbridge.c | 20 |
2 files changed, 15 insertions, 6 deletions
diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig index 4b1638c95d..7b41f05c3a 100644 --- a/src/northbridge/intel/i440bx/Kconfig +++ b/src/northbridge/intel/i440bx/Kconfig @@ -5,7 +5,6 @@ config NORTHBRIDGE_INTEL_I440BX select NO_ECAM_MMCONF_SUPPORT select HAVE_DEBUG_RAM_SETUP select NO_CBFS_MCACHE - select LEGACY_SMP_INIT config SDRAMPWR_4DIMM bool diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c index 51621b5014..618141b35f 100644 --- a/src/northbridge/intel/i440bx/northbridge.c +++ b/src/northbridge/intel/i440bx/northbridge.c @@ -1,12 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <console/console.h> +#include <cpu/x86/mp.h> #include <device/pci_ops.h> -#include <stdint.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <cpu/cpu.h> +#include <stdint.h> #include "i440bx.h" static void northbridge_init(struct device *dev) @@ -72,15 +72,25 @@ static struct device_operations pci_domain_ops = { .scan_bus = pci_domain_scan_bus, }; -static void cpu_bus_init(struct device *dev) +static int get_cpu_count(void) +{ + return CONFIG_MAX_CPUS; +} + +static const struct mp_ops mp_ops = { + .get_cpu_count = get_cpu_count, +}; + +void mp_init_cpus(struct bus *cpu_bus) { - initialize_cpus(dev->link_list); + /* TODO: Handle mp_init_with_smm failure? */ + mp_init_with_smm(cpu_bus, &mp_ops); } static struct device_operations cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, - .init = cpu_bus_init, + .init = mp_cpu_bus_init, }; static void enable_dev(struct device *dev) |