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authorRaul E Rangel <rrangel@chromium.org>2022-02-03 15:53:21 -0700
committerRaul Rangel <rrangel@chromium.org>2022-02-08 16:35:08 +0000
commit45ba318b2a7348a24f2f073cc0258018d31a9b47 (patch)
tree52f29fb190638cbd1d3e8eb61db55e66466be6cd
parent9d28899f2dfb72529b26dca2a46c6c088c587a41 (diff)
mb/google/guybrush: Enable CONSOLE_CBMEM_DUMP_TO_UART
This will make debugging boot failures with a non-serial firmware easier. If we encounter an error that requires a reboot, this will dump the entire CBMEM contents onto the UART. This is especially helpful during S0i3 resume because the PSP verstage console logs are not exposed anywhere. BUG=b:215599230 TEST=Cause verstage error in S0i3 with non-serial firmware and see that the verstage logs were dumped to the UART before rebooting. Entering PSP verstage S0i3 resume tpm_setup failed rv:1 VB2:vb2api_fail() Need recovery, reason: 0x3f / 0xcc Saving nvdata Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I908037527206cc7bed2302fab60b2912d6dabc73 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61612 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
-rw-r--r--src/mainboard/google/guybrush/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/guybrush/Kconfig b/src/mainboard/google/guybrush/Kconfig
index 43cbddedc6..b2fce84c85 100644
--- a/src/mainboard/google/guybrush/Kconfig
+++ b/src/mainboard/google/guybrush/Kconfig
@@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS
def_bool y
select AMD_SOC_CONSOLE_UART
select BOARD_ROMSIZE_KB_16384
+ select CONSOLE_CBMEM_DUMP_TO_UART if !CONSOLE_SERIAL
select DISABLE_KEYBOARD_RESET_PIN
select DISABLE_SPI_FLASH_ROM_SHARING
select DRIVERS_ACPI_THERMAL_ZONE