diff options
author | Nick Vaccaro <nvaccaro@google.com> | 2018-02-27 10:30:34 -0800 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-03-02 15:18:52 +0000 |
commit | 4100f2b97c315ec92f37f3392b733ee0b6f52887 (patch) | |
tree | 5b46cf01c2f49ebeca34b23e82e02ba4bbc0ef4b | |
parent | aef0d6b0a7ec867ee29acf9e1c695be27626f239 (diff) |
mainboard/google/zoombini/variant/meowth: enable speed shift
BUG=b:73817825,b:69011806
BRANCH=master
TEST=Build and flash to meowth, verify cpufreq shows up in kernel
for all cores :
localhost ~ # find / -name "cpufreq"
/sys/devices/system/cpu/cpu3/cpufreq
/sys/devices/system/cpu/cpu1/cpufreq
/sys/devices/system/cpu/cpufreq
/sys/devices/system/cpu/cpu2/cpufreq
/sys/devices/system/cpu/cpu0/cpufreq
/sys/module/cpufreq
/usr/share/laptop-mode-tools/modules/cpufreq
Change-Id: I63242b2b049e37167c0d3b8eab630cb6e15a75fd
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/24902
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/mainboard/google/zoombini/variants/meowth/devicetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb index c0e4ac3317..cc0d3926a9 100644 --- a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb +++ b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb @@ -70,6 +70,9 @@ chip soc/intel/cannonlake register "PchHdaAudioLinkSsp0" = "1" register "PchHdaAudioLinkSsp1" = "1" + # Enable cpufreq + register "speed_shift_enable" = "1" + device domain 0 on device pci 00.0 on end # Host Bridge device pci 02.0 on end # Integrated Graphics Device |