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| author | Evgeny Zinoviev <me@ch1p.com> | 2019-05-25 17:38:53 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-29 20:07:10 +0000 |
| commit | 3d90d3bfce7b3e2a885bb4722ecb3a5c127e2882 (patch) | |
| tree | 93a8e0b3a65befc77d38d4face361e0c80c73453 | |
| parent | 75c20157ab927aa1e453f710bab96618d556bb20 (diff) | |
util/autoport: Add info about rank 1 mirroring
inteltool can't detect whether address mapping is normal or
mirrored, which in turn may be cause RAM initialization to
fail when using spd.bin generated by inteltool.
Mention this in readme as it may help someone.
Change-Id: I8d24e4d9332bdcf484987581dd6941e2bf9c4f87
Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32683
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
| -rw-r--r-- | util/autoport/readme.md | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/util/autoport/readme.md b/util/autoport/readme.md index cfa8c36a38..fa349b906f 100644 --- a/util/autoport/readme.md +++ b/util/autoport/readme.md @@ -268,6 +268,12 @@ If several slots are soldered there are two ways to handle them: not forget to copy the data on all the array elements that need it. * If they use different data, use several files. +If memory initialization is not working, in particular write training (timB) +on DIMM's second rank fails, try enbling rank 1 mirroring, which can't be +detected by inteltool. It is described by SPD field "Address Mapping from Edge +Connector to DRAM", byte `63` (`0x3f`). Bit 0 describes Rank 1 Mapping, +0 = standard, 1 = mirrored; set it to 1. Bits 1-7 are reserved. + ### `board_info.txt` `board_info.txt` is a text file used in the board status page to list all |