diff options
| author | Hsuan Ting Chen <roccochen@chromium.org> | 2021-10-08 15:31:00 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-11 12:52:38 +0000 |
| commit | 3bfe46c2b09360eea5e5482245d8239d1c194334 (patch) | |
| tree | a68744831a9e9dffcc58717acddc7524da594d9b | |
| parent | d6606f1745de4ca2a1539e3d188dce5a11a3b384 (diff) | |
mb/google/guybrush: Add GPIO EC in RW to early GPIO tables
Before attempting another commit 6260bf71 (vboot_logic: Set
VB2_CONTEXT_EC_TRUSTED in verstage_main), ensure that guybrush programs
GPIO_EC_IN_RW (GPIO_91) as an early GPIO so that it can be read from in
verstage.
Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org>
Change-Id: Ia6dcb225bbca89f3a873aad75a7d67625cdd3742
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58192
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
| -rw-r--r-- | src/mainboard/google/guybrush/variants/baseboard/gpio.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/guybrush/variants/baseboard/gpio.c b/src/mainboard/google/guybrush/variants/baseboard/gpio.c index 98780404fb..2fa525486e 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/gpio.c +++ b/src/mainboard/google/guybrush/variants/baseboard/gpio.c @@ -226,6 +226,10 @@ static const struct soc_amd_gpio early_gpio_table[] = { PAD_NF(GPIO_141, UART0_RXD, PULL_NONE), /* UART0_TXD */ PAD_NF(GPIO_143, UART0_TXD, PULL_NONE), + +/* Support EC trusted */ + /* SD_EX_PRSNT_L(Guybrush BoardID 1 only) / EC_IN_RW_OD */ + PAD_GPI(GPIO_91, PULL_NONE), }; /* Power-on timing requirements: |