Kconfig: Update default hex values to start with 0x

Kconfig hex values don't need to be in quotes, and should start with
'0x'.  If the default value isn't set this way, Kconfig will add the
0x to the start, and the entry can be added unnecessarily to the
defconfig since it's "different" than what was set by the default.

A check for this has been added to the Kconfig lint tool.

Change-Id: I86f37340682771700011b6285e4b4af41b7e9968
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16834
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

28 files changed, 35 insertions, 35 deletions

diff --git a/src/Kconfig b/src/Kconfig
index f6c022e8be..91b27ceef5 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -634,7 +634,7 @@ config IOAPIC
 
 config CACHE_ROM_SIZE_OVERRIDE
 	hex
-	default 0
+	default 0x0
 
 # TODO: Can probably be removed once all chipsets have kconfig options for it.
 config VIDEO_MB
diff --git a/src/console/Kconfig b/src/console/Kconfig
index e945c259d7..8f74613847 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -330,7 +330,7 @@ config CMOS_POST
 config CMOS_POST_OFFSET
 	hex "Offset into CMOS to store POST codes"
 	depends on CMOS_POST
-	default 0
+	default 0x0
 	help
 	  If CMOS_POST is enabled then an offset into CMOS must be provided.
 	  If CONFIG_HAVE_OPTION_TABLE is enabled then it will use the value
diff --git a/src/device/Kconfig b/src/device/Kconfig
index b1f8dae743..c7dfe9cff2 100644
--- a/src/device/Kconfig
+++ b/src/device/Kconfig
@@ -288,7 +288,7 @@ endif # EARLY_PCI_BRIDGE
 config SUBSYSTEM_VENDOR_ID
 	hex "Override PCI Subsystem Vendor ID"
 	depends on PCI
-	default "0x0000"
+	default 0x0000
 	help
 	  This config option will override the devicetree settings for
 	  PCI Subsystem Vendor ID.
@@ -296,7 +296,7 @@ config SUBSYSTEM_VENDOR_ID
 config SUBSYSTEM_DEVICE_ID
 	hex "Override PCI Subsystem Device ID"
 	depends on PCI
-	default "0x0000"
+	default 0x0000
 	help
 	  This config option will override the devicetree settings for
 	  PCI Subsystem Device ID.
diff --git a/src/drivers/i2c/tpm/Kconfig b/src/drivers/i2c/tpm/Kconfig
index a5ab0771c4..89e4621b77 100644
--- a/src/drivers/i2c/tpm/Kconfig
+++ b/src/drivers/i2c/tpm/Kconfig
@@ -22,12 +22,12 @@ endchoice
 
 config DRIVER_TPM_I2C_BUS
 	hex "I2C TPM chip bus"
-	default 9 # FIXME, workaround for Kconfig BS
+	default 0x9 # FIXME, workaround for Kconfig BS
 	depends on I2C_TPM
 
 config DRIVER_TPM_I2C_ADDR
 	hex "I2C TPM chip address"
-	default 2 # FIXME, workaround for Kconfig BS
+	default 0x2 # FIXME, workaround for Kconfig BS
 	depends on I2C_TPM
 
 config DRIVER_TPM_I2C_IRQ
diff --git a/src/drivers/pc80/tpm/Kconfig b/src/drivers/pc80/tpm/Kconfig
index 0e8a0203df..f32071cf7d 100644
--- a/src/drivers/pc80/tpm/Kconfig
+++ b/src/drivers/pc80/tpm/Kconfig
@@ -25,7 +25,7 @@ config TPM_TIS_BASE_ADDRESS
 
 config TPM_PIRQ
 	hex
-	default 0
+	default 0x0
 	depends on LPC_TPM
 	help
 	  This can be used to specify a PIRQ to use instead of SERIRQ,
diff --git a/src/drivers/spi/tpm/Kconfig b/src/drivers/spi/tpm/Kconfig
index 49ab2a6bfe..d66d9ffec0 100644
--- a/src/drivers/spi/tpm/Kconfig
+++ b/src/drivers/spi/tpm/Kconfig
@@ -4,7 +4,7 @@ config SPI_TPM
 
 config DRIVER_TPM_SPI_BUS
 	hex "SPI bus TPM chip is connected to"
-	default 0
+	default 0x0
 	depends on SPI_TPM
 
 config DRIVER_TPM_SPI_CHIP
diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig
index f4ff30372c..f8090030ef 100644
--- a/src/ec/google/chromeec/Kconfig
+++ b/src/ec/google/chromeec/Kconfig
@@ -72,7 +72,7 @@ config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US
 config EC_GOOGLE_CHROMEEC_SPI_CHIP
 	depends on EC_GOOGLE_CHROMEEC_SPI
 	hex
-	default 0
+	default 0x0
 
 config EC_GOOGLE_CHROMEEC_BOARDNAME
 	depends on EC_GOOGLE_CHROMEEC
diff --git a/src/mainboard/asus/a8v-e_deluxe/Kconfig b/src/mainboard/asus/a8v-e_deluxe/Kconfig
index a1c2fd9732..b067047ae1 100644
--- a/src/mainboard/asus/a8v-e_deluxe/Kconfig
+++ b/src/mainboard/asus/a8v-e_deluxe/Kconfig
@@ -39,7 +39,7 @@ config MAINBOARD_PART_NUMBER
 
 config HW_MEM_HOLE_SIZEK
 	hex
-	default 0
+	default 0x0
 
 config MAX_CPUS
 	int
diff --git a/src/mainboard/asus/a8v-e_se/Kconfig b/src/mainboard/asus/a8v-e_se/Kconfig
index dffe9eb14f..0188ff98b5 100644
--- a/src/mainboard/asus/a8v-e_se/Kconfig
+++ b/src/mainboard/asus/a8v-e_se/Kconfig
@@ -39,7 +39,7 @@ config MAINBOARD_PART_NUMBER
 
 config HW_MEM_HOLE_SIZEK
 	hex
-	default 0
+	default 0x0
 
 config MAX_CPUS
 	int
diff --git a/src/mainboard/asus/k8v-x/Kconfig b/src/mainboard/asus/k8v-x/Kconfig
index 4eb1bec62b..674059b0a5 100644
--- a/src/mainboard/asus/k8v-x/Kconfig
+++ b/src/mainboard/asus/k8v-x/Kconfig
@@ -44,7 +44,7 @@ config AGP_APERTURE_SIZE
 
 config HW_MEM_HOLE_SIZEK
 	hex
-	default 0
+	default 0x0
 
 config MAX_CPUS
 	int
diff --git a/src/mainboard/asus/kcma-d8/Kconfig b/src/mainboard/asus/kcma-d8/Kconfig
index 3c8cdcd85f..15422791be 100644
--- a/src/mainboard/asus/kcma-d8/Kconfig
+++ b/src/mainboard/asus/kcma-d8/Kconfig
@@ -53,7 +53,7 @@ config DCACHE_RAM_SIZE
 
 config APIC_ID_OFFSET
 	hex
-	default 0
+	default 0x0
 
 config MAINBOARD_PART_NUMBER
 	string
diff --git a/src/mainboard/asus/kfsn4-dre/Kconfig b/src/mainboard/asus/kfsn4-dre/Kconfig
index 5e455e07a8..f40899d66c 100644
--- a/src/mainboard/asus/kfsn4-dre/Kconfig
+++ b/src/mainboard/asus/kfsn4-dre/Kconfig
@@ -43,7 +43,7 @@ config DCACHE_RAM_SIZE
 
 config APIC_ID_OFFSET
 	hex
-	default 0
+	default 0x0
 
 config MAINBOARD_PART_NUMBER
 	string
diff --git a/src/mainboard/asus/kgpe-d16/Kconfig b/src/mainboard/asus/kgpe-d16/Kconfig
index ca1f0c81f7..a65ceccada 100644
--- a/src/mainboard/asus/kgpe-d16/Kconfig
+++ b/src/mainboard/asus/kgpe-d16/Kconfig
@@ -54,7 +54,7 @@ config DCACHE_RAM_SIZE
 
 config APIC_ID_OFFSET
 	hex
-	default 0
+	default 0x0
 
 config MAINBOARD_PART_NUMBER
 	string
diff --git a/src/mainboard/asus/m2v/Kconfig b/src/mainboard/asus/m2v/Kconfig
index 72527be3bb..20c2689dd8 100644
--- a/src/mainboard/asus/m2v/Kconfig
+++ b/src/mainboard/asus/m2v/Kconfig
@@ -42,7 +42,7 @@ config MAINBOARD_PART_NUMBER
 
 config HW_MEM_HOLE_SIZEK
 	hex
-	default 0
+	default 0x0
 
 config MAX_CPUS
 	int
diff --git a/src/mainboard/google/gru/Kconfig b/src/mainboard/google/gru/Kconfig
index 315083975b..41e8105595 100644
--- a/src/mainboard/google/gru/Kconfig
+++ b/src/mainboard/google/gru/Kconfig
@@ -65,7 +65,7 @@ config DRAM_SIZE_MB
 
 config EC_GOOGLE_CHROMEEC_SPI_BUS
 	hex
-	default 5
+	default 0x5
 
 config BOOT_DEVICE_SPI_FLASH_BUS
 	int
@@ -73,7 +73,7 @@ config BOOT_DEVICE_SPI_FLASH_BUS
 
 config DRIVER_TPM_I2C_BUS
 	hex
-	default 0
+	default 0x0
 
 config DRIVER_TPM_I2C_ADDR
 	hex
diff --git a/src/mainboard/google/nyan/Kconfig b/src/mainboard/google/nyan/Kconfig
index e68ad4e8f7..9b25d5c9b2 100644
--- a/src/mainboard/google/nyan/Kconfig
+++ b/src/mainboard/google/nyan/Kconfig
@@ -72,7 +72,7 @@ config BOOT_DEVICE_SPI_FLASH_BUS
 
 config EC_GOOGLE_CHROMEEC_SPI_BUS
 	hex
-	default 1
+	default 0x1
 
 config DRIVER_TPM_I2C_BUS
 	hex
diff --git a/src/mainboard/google/nyan_big/Kconfig b/src/mainboard/google/nyan_big/Kconfig
index 3f94637c7e..bcf8f5d619 100644
--- a/src/mainboard/google/nyan_big/Kconfig
+++ b/src/mainboard/google/nyan_big/Kconfig
@@ -73,7 +73,7 @@ config BOOT_DEVICE_SPI_FLASH_BUS
 
 config EC_GOOGLE_CHROMEEC_SPI_BUS
 	hex
-	default 1
+	default 0x1
 
 config DRIVER_TPM_I2C_BUS
 	hex
diff --git a/src/mainboard/google/nyan_blaze/Kconfig b/src/mainboard/google/nyan_blaze/Kconfig
index e47ebfaca6..0782cc0fd6 100644
--- a/src/mainboard/google/nyan_blaze/Kconfig
+++ b/src/mainboard/google/nyan_blaze/Kconfig
@@ -74,7 +74,7 @@ config BOOT_DEVICE_SPI_FLASH_BUS
 
 config EC_GOOGLE_CHROMEEC_SPI_BUS
 	hex
-	default 1
+	default 0x1
 
 config DRIVER_TPM_I2C_BUS
 	hex
diff --git a/src/mainboard/google/oak/Kconfig b/src/mainboard/google/oak/Kconfig
index 1228cff140..267464305c 100644
--- a/src/mainboard/google/oak/Kconfig
+++ b/src/mainboard/google/oak/Kconfig
@@ -50,7 +50,7 @@ config MAINBOARD_VENDOR
 
 config EC_GOOGLE_CHROMEEC_SPI_BUS
 	hex
-	default 0
+	default 0x0
 
 config DRIVER_TPM_I2C_BUS
 	hex
diff --git a/src/mainboard/google/peach_pit/Kconfig b/src/mainboard/google/peach_pit/Kconfig
index 125333c681..be06a18d0a 100644
--- a/src/mainboard/google/peach_pit/Kconfig
+++ b/src/mainboard/google/peach_pit/Kconfig
@@ -42,7 +42,7 @@ config DRAM_SIZE_MB
 
 config EC_GOOGLE_CHROMEEC_SPI_BUS
 	hex
-	default 2
+	default 0x2
 
 config UART_FOR_CONSOLE
 	int
diff --git a/src/mainboard/google/veyron/Kconfig b/src/mainboard/google/veyron/Kconfig
index b6a687cd56..1729155332 100644
--- a/src/mainboard/google/veyron/Kconfig
+++ b/src/mainboard/google/veyron/Kconfig
@@ -54,7 +54,7 @@ config MAINBOARD_VENDOR
 
 config EC_GOOGLE_CHROMEEC_SPI_BUS
 	hex
-	default 0
+	default 0x0
 
 config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US
 	int
diff --git a/src/mainboard/hp/dl165_g6_fam10/Kconfig b/src/mainboard/hp/dl165_g6_fam10/Kconfig
index 703200d00f..a1f55f41fa 100644
--- a/src/mainboard/hp/dl165_g6_fam10/Kconfig
+++ b/src/mainboard/hp/dl165_g6_fam10/Kconfig
@@ -33,7 +33,7 @@ config DCACHE_RAM_SIZE
 
 config APIC_ID_OFFSET
 	hex
-	default 0
+	default 0x0
 
 config MAINBOARD_PART_NUMBER
 	string
diff --git a/src/mainboard/msi/ms7135/Kconfig b/src/mainboard/msi/ms7135/Kconfig
index 50f989e675..3affb6a2a1 100644
--- a/src/mainboard/msi/ms7135/Kconfig
+++ b/src/mainboard/msi/ms7135/Kconfig
@@ -38,7 +38,7 @@ config MAX_PHYSICAL_CPUS
 
 config HT_CHAIN_UNITID_BASE
 	hex
-	default 0
+	default 0x0
 
 config HT_CHAIN_END_UNITID_BASE
 	hex
diff --git a/src/mainboard/tyan/s2912_fam10/Kconfig b/src/mainboard/tyan/s2912_fam10/Kconfig
index 8a517e5e5c..861c2e51ae 100644
--- a/src/mainboard/tyan/s2912_fam10/Kconfig
+++ b/src/mainboard/tyan/s2912_fam10/Kconfig
@@ -33,7 +33,7 @@ config DCACHE_RAM_SIZE
 
 config APIC_ID_OFFSET
 	hex
-	default 0
+	default 0x0
 
 config MAINBOARD_PART_NUMBER
 	string
diff --git a/src/mainboard/winent/mb6047/Kconfig b/src/mainboard/winent/mb6047/Kconfig
index 622441e3ba..5a3b81d604 100644
--- a/src/mainboard/winent/mb6047/Kconfig
+++ b/src/mainboard/winent/mb6047/Kconfig
@@ -40,7 +40,7 @@ config MAX_PHYSICAL_CPUS
 
 config HT_CHAIN_UNITID_BASE
 	hex
-	default 0
+	default 0x0
 
 config HT_CHAIN_END_UNITID_BASE
 	hex
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index 03934d23e5..517fd21ee8 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -167,7 +167,7 @@ config INTEL_PCH_UART_CONSOLE
 
 config INTEL_PCH_UART_CONSOLE_NUMBER
 	hex "Serial IO UART number to use for console"
-	default "0x0"
+	default 0x0
 	depends on INTEL_PCH_UART_CONSOLE
 
 config TTYS0_BASE
diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig
index 5748f790c8..a48b93a67c 100644
--- a/src/southbridge/amd/cimx/sb800/Kconfig
+++ b/src/southbridge/amd/cimx/sb800/Kconfig
@@ -39,8 +39,8 @@ config ENABLE_IDE_COMBINED_MODE
 
 config IDE_COMBINED_MODE
 	hex
-	default "0x0" if ENABLE_IDE_COMBINED_MODE
-	default "0x1" if !ENABLE_IDE_COMBINED_MODE
+	default 0x0 if ENABLE_IDE_COMBINED_MODE
+	default 0x1 if !ENABLE_IDE_COMBINED_MODE
 
 choice
 	prompt "SATA Mode"
@@ -70,9 +70,9 @@ endchoice
 config SB800_SATA_MODE
 	hex
 	depends on (SB800_SATA_IDE || SB800_SATA_RAID || SB800_SATA_AHCI)
-	default "0x0" if SB800_SATA_IDE
-	default "0x1" if SB800_SATA_RAID
-	default "0x2" if SB800_SATA_AHCI
+	default 0x0 if SB800_SATA_IDE
+	default 0x1 if SB800_SATA_RAID
+	default 0x2 if SB800_SATA_AHCI
 
 config SB_SUPERIO_HWM
 	bool
diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig
index 129c965904..b7431b2408 100644
--- a/src/vendorcode/google/chromeos/Kconfig
+++ b/src/vendorcode/google/chromeos/Kconfig
@@ -212,7 +212,7 @@ config VBOOT_KEYBLOCK_VERSION
 
 config VBOOT_KEYBLOCK_PREAMBLE_FLAGS
 	hex "Keyblock preamble flags"
-	default 0
+	default 0x0
 
 endmenu # Keys