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authorqinwentao <qinwentao@huaqin.corp-partner.google.com>2023-05-19 15:25:01 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-05-24 18:27:18 +0000
commit3afa59310308ed1f57ef68c725e01e62fe8ad1ea (patch)
tree1667d6552d89e1c599066d31860d25de7fa6fd4b
parent948c0b7947115d2c743cf9d8e073af358622c6e8 (diff)
mb/google/rex/var/screebo: Add BT devicetree config
Enabling BT for screebo project BUG=b:278169273 TEST=Check whether BT can connect to Bluetooth device Signed-off-by: qinwentao <qinwentao@huaqin.corp-partner.google.com> Change-Id: I0ecd62abfbe751e1036948b1490844e7e63d7f0d Signed-off-by: qinwentao <qinwentao@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75352 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kun Liu <liukun11@huaqin.corp-partner.google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
-rw-r--r--src/mainboard/google/rex/variants/screebo/overridetree.cb7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/screebo/overridetree.cb b/src/mainboard/google/rex/variants/screebo/overridetree.cb
index 2e7b208329..ee59f6a342 100644
--- a/src/mainboard/google/rex/variants/screebo/overridetree.cb
+++ b/src/mainboard/google/rex/variants/screebo/overridetree.cb
@@ -4,6 +4,7 @@ chip soc/intel/meteorlake
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC0)" # USB2_C0
register "usb2_ports[2]" = "USB2_PORT_MID(OC2)" # Type-A Port A1
register "usb2_ports[8]" = "USB2_PORT_MID(OC3)" # Type-A Port A0
+ register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Bluetooth
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC3)" # USB3/2 Type A port A0
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # USB3/2 Type A port A1
@@ -288,6 +289,12 @@ chip soc/intel/meteorlake
device ref usb2_port9 on end
end
chip drivers/usb/acpi
+ register "desc" = ""USB2 Bluetooth""
+ register "type" = "UPC_TYPE_INTERNAL"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B01)"
+ device ref usb2_port10 on end
+ end
+ chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A0 (MLB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"