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authorBenjamin Doron <benjamin.doron00@gmail.com>2022-02-09 00:58:43 +0000
committerMichael Niewöhner <foss@mniewoehner.de>2022-02-12 11:29:33 +0000
commit39cf79900fa333992eb2614f7559dd1b2c7ac5e9 (patch)
tree4f69efba5a82c39c4fca29ebbde92bd29681b7df
parent2fdcb64ec96dc80ae83d289ba9d18e20f86f2930 (diff)
util/inteltool: Actually read SATA init data from SIRD
Fix issue where registers always seem to contain their own offset. After writing the desired register into SIRI, the requested data is returned in SIRD. This register is 4 bytes after SIRI, commonly 0xA4. Tested on TGL-H (SATA SIR registers are common), genuine data is returned. Change-Id: I322b11d53178e5b64e353c1b4e576548592c16c3 Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61737 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
-rw-r--r--util/inteltool/ahci.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/util/inteltool/ahci.c b/util/inteltool/ahci.c
index 2080e3bab5..054c74fdb5 100644
--- a/util/inteltool/ahci.c
+++ b/util/inteltool/ahci.c
@@ -93,7 +93,7 @@ int print_ahci(struct pci_dev *ahci)
size_t ahci_registers_size = 0, i;
size_t ahci_cfg_registers_size = 0;
const io_register_t *ahci_cfg_registers;
- size_t ahci_sir_offset = 0;
+ size_t ahci_sir_index_offset = 0, ahci_sir_data_offset;
size_t ahci_sir_registers_size = 0;
const io_register_t *ahci_sir_registers;
@@ -107,7 +107,7 @@ int print_ahci(struct pci_dev *ahci)
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_SATA:
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SATA:
ahci_registers_size = 0x800;
- ahci_sir_offset = 0xa0;
+ ahci_sir_index_offset = 0xa0;
ahci_cfg_registers = sunrise_ahci_cfg_registers;
ahci_cfg_registers_size = ARRAY_SIZE(sunrise_ahci_cfg_registers);
ahci_sir_registers = sunrise_ahci_sir_registers;
@@ -117,6 +117,8 @@ int print_ahci(struct pci_dev *ahci)
ahci_registers_size = 0x400;
}
+ ahci_sir_data_offset = ahci_sir_index_offset + 4;
+
printf("\n============= AHCI Configuration Registers ==============\n\n");
for (i = 0; i < ahci_cfg_registers_size; i++) {
switch (ahci_cfg_registers[i].size) {
@@ -143,24 +145,24 @@ int print_ahci(struct pci_dev *ahci)
printf("\n============= SATA Initialization Registers ==============\n\n");
for (i = 0; i < ahci_sir_registers_size; i++) {
- pci_write_byte(ahci, ahci_sir_offset, ahci_sir_registers[i].addr);
+ pci_write_byte(ahci, ahci_sir_index_offset, ahci_sir_registers[i].addr);
switch (ahci_sir_registers[i].size) {
case 4:
printf("0x%02x: 0x%08x (%s)\n",
ahci_sir_registers[i].addr,
- pci_read_long(ahci, ahci_sir_offset),
+ pci_read_long(ahci, ahci_sir_data_offset),
ahci_sir_registers[i].name);
break;
case 2:
printf("0x%02x: 0x%04x (%s)\n",
ahci_sir_registers[i].addr,
- pci_read_word(ahci, ahci_sir_offset),
+ pci_read_word(ahci, ahci_sir_data_offset),
ahci_sir_registers[i].name);
break;
case 1:
printf("0x%02x: 0x%02x (%s)\n",
ahci_sir_registers[i].addr,
- pci_read_byte(ahci, ahci_sir_offset),
+ pci_read_byte(ahci, ahci_sir_data_offset),
ahci_sir_registers[i].name);
break;
}