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authorBill XIE <persmule@hardenedlinux.org>2020-05-18 17:18:43 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-06-29 15:51:30 +0000
commit38569d061099d6453adc2dfc11eb6a26fb1985a3 (patch)
tree0f8e1799aca59528bd9ce64871e3ec882401a445
parentd87277abbf70b7f29034a503689de47aba7e3052 (diff)
mb/lenovo/{x230, x230s}: Disable SuperSpeed capabilities for WWAN USB
Although on ThinkPads with Panther Point PCH the usb port inside wwan socket is usually wired to XHCI, it has actually no SuperSpeed lines, so maybe it is okay to disable SuperSpeed capabilities, and wire them to EHCI #2 by making use of XUSB2PRM and USB3PRM. This applies to both variants of x230. Change-Id: Ia8d27be84e4dbfa0efed506b9fc010e7f4d6ba23 Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41505 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/lenovo/x230/devicetree.cb5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb
index 3a8e5fe852..085b4e137b 100644
--- a/src/mainboard/lenovo/x230/devicetree.cb
+++ b/src/mainboard/lenovo/x230/devicetree.cb
@@ -58,8 +58,9 @@ chip northbridge/intel/sandybridge
register "gen2_dec" = "0x0c15e1"
register "gen4_dec" = "0x0c06a1"
- register "xhci_switchable_ports" = "0xf"
- register "superspeed_capable_ports" = "0xf"
+ # Do not enable xHCI Port 4 since WWAN USB is EHCI-only
+ register "xhci_switchable_ports" = "0x7"
+ register "superspeed_capable_ports" = "0x7"
register "xhci_overcurrent_mapping" = "0x4000201"
# Enable zero-based linear PCIe root port functions