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authorEran Mitrani <mitrani@google.com>2023-10-17 13:41:50 -0700
committerFelix Held <felix-coreboot@felixheld.de>2023-11-07 20:15:31 +0000
commit36991b22170be625b4946eb23669be39a623cf57 (patch)
tree93e3f7561c63c3f10b0a79d7a7f6b638951bff89
parentc2c8519ae9b734eb1ea6cdf30c5cb0fd78ceee77 (diff)
mb/google/rex/variants/deku: Add I2C config
Add I2C config based on Deku schematics. TPM is connected to I2C 4 BUG=b:305793886 TEST=util/abuild/abuild -p none -t google/rex -x -a -b deku Change-Id: I496e236531b2b59b320c77c36f542f4fa80a51a1 Signed-off-by: Eran Mitrani <mitrani@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78449 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/rex/variants/deku/overridetree.cb36
1 files changed, 36 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/deku/overridetree.cb b/src/mainboard/google/rex/variants/deku/overridetree.cb
index b68840fad0..293e6d67a8 100644
--- a/src/mainboard/google/rex/variants/deku/overridetree.cb
+++ b/src/mainboard/google/rex/variants/deku/overridetree.cb
@@ -1,4 +1,40 @@
chip soc/intel/meteorlake
+
+ register "serial_io_i2c_mode" = "{
+ [PchSerialIoIndexI2C0] = PchSerialIoDisabled,
+ [PchSerialIoIndexI2C1] = PchSerialIoDisabled,
+ [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
+ [PchSerialIoIndexI2C3] = PchSerialIoDisabled,
+ [PchSerialIoIndexI2C4] = PchSerialIoPci,
+ [PchSerialIoIndexI2C5] = PchSerialIoDisabled,
+ }"
+
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| I2C4 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .i2c[4] = {
+ .early_init = 1,
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 600,
+ .fall_time_ns = 400,
+ .data_hold_time_ns = 50,
+ },
+ }"
+
device domain 0 on
+ device ref i2c4 on
+ chip drivers/i2c/tpm
+ register "hid" = ""GOOG0005""
+ register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E03_IRQ)"
+ device i2c 50 on end
+ end
+ end
end
+
end