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authorUsha P <usha.p@intel.com>2022-01-17 21:36:27 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-01-22 02:01:37 +0000
commit36871dbdb756d918d0911e56375ca733cdf08f08 (patch)
treef9a53e9624cacf99367080d929fc1711ad4dca67
parent23e2cde59791500c32765c5c53b37279347c1c95 (diff)
mb/intel/adlrvp: Add missing CAM1 RST GPIO for ADL-N
Signed-off-by: Usha P <usha.p@intel.com> Change-Id: I79f2206bee5403c3fb1c999918fbd2177d0d07ab Reviewed-on: https://review.coreboot.org/c/coreboot/+/61163 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org>
-rw-r--r--src/mainboard/intel/adlrvp/gpio_n.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/gpio_n.c b/src/mainboard/intel/adlrvp/gpio_n.c
index e520550514..9ba20bab17 100644
--- a/src/mainboard/intel/adlrvp/gpio_n.c
+++ b/src/mainboard/intel/adlrvp/gpio_n.c
@@ -158,6 +158,8 @@ static const struct pad_config gpio_table[] = {
/* CAM_STROBE */
PAD_CFG_GPO(GPP_B18, 0, PLTRST),
+ /* CAM1_RST_N */
+ PAD_CFG_GPO(GPP_A21, 1, PLTRST),
/* CAM1_PWR_EN */
PAD_CFG_GPO(GPP_B23, 1, PLTRST),
/* CAM2_RST */