diff options
| author | Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com> | 2016-10-31 17:03:55 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-11-02 18:27:46 +0100 |
| commit | 362180a8a99705caedf9e2843a43d898cb1960af (patch) | |
| tree | c74fe503c316a595396d1f9bf2080f1e62225957 | |
| parent | 318ed6f8188c3f797fd2fbbc8122f5e2cb8b63d3 (diff) | |
soc/intel/apollolake: Disable Monitor and Mwait feature
Monitor/Mwait is broken on APL. So, it needs to be disabled.
BUG=chrome-os-partner:56922
BRANCH=None
Change-Id: I12cd4280de62e0a639b43538171660ee4c0a0265
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Reviewed-on: https://review.coreboot.org/17200
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
| -rw-r--r-- | src/include/cpu/intel/turbo.h | 3 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/cpu.c | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/src/include/cpu/intel/turbo.h b/src/include/cpu/intel/turbo.h index 8a93b3cf96..6626cb13c0 100644 --- a/src/include/cpu/intel/turbo.h +++ b/src/include/cpu/intel/turbo.h @@ -21,6 +21,9 @@ #define PM_CAP_TURBO_MODE (1 << 1) #define MSR_IA32_MISC_ENABLES 0x1a0 +/* Disable the Monitor Mwait FSM feature */ +#define MONITOR_MWAIT_DIS_MASK 0x40000 + #define H_MISC_DISABLE_TURBO (1 << 6) enum { diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index bd5cff50a9..6b5dee2339 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -29,6 +29,7 @@ #include <soc/cpu.h> #include <soc/iomap.h> #include <soc/smm.h> +#include <cpu/intel/turbo.h> static const struct reg_script core_msr_script[] = { /* Enable C-state and IO/MWAIT redirect */ @@ -40,6 +41,8 @@ static const struct reg_script core_msr_script[] = { (ACPI_PMIO_CST_REG | (PMG_IO_BASE_CST_RNG_BLK_SIZE << 16))), /* Disable C1E */ REG_MSR_RMW(MSR_POWER_CTL, ~0x2, 0), + /* Disable support for MONITOR and MWAIT instructions */ + REG_MSR_RMW(MSR_IA32_MISC_ENABLES, ~MONITOR_MWAIT_DIS_MASK, 0), REG_SCRIPT_END }; |