diff options
author | Won Chung <wonchung@google.com> | 2023-07-28 21:03:31 +0000 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-08-11 13:08:21 +0000 |
commit | 35047599b28ac841cf606cc5b8252a9280a2f3ea (patch) | |
tree | 5793dfca908c337916a2a45460345f6be1f29d5d | |
parent | b8abde7a8ef411f1439013932c7c25f3417efd5a (diff) |
mb/google/brya/var/anahera: Add new GFX devices with custom _PLD
Add new GFX devices for DDI and TCP with custom _PLD to describe the
corresponding ports.
BUG=b:277629750
TEST=emerge-brya coreboot
Change-Id: I7a775838358e7abe3f03d0ae65fb619c15dbad6f
Signed-off-by: Won Chung <wonchung@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76875
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/mainboard/google/brya/variants/anahera/overridetree.cb | 39 | ||||
-rw-r--r-- | src/mainboard/google/brya/variants/anahera4es/overridetree.cb | 39 |
2 files changed, 76 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb index 14b823c3ca..9a09072ac6 100644 --- a/src/mainboard/google/brya/variants/anahera/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb @@ -87,7 +87,8 @@ chip soc/intel/alderlake device domain 0 on device ref igpu on chip drivers/gfx/generic - register "device_count" = "1" + register "device_count" = "6" + # DDIA for eDP register "device[0].name" = ""LCD"" # Use ChromeOS privacy screen _HID register "device[0].hid" = ""GOOG0010"" @@ -95,10 +96,46 @@ chip soc/intel/alderlake register "device[0].addr" = "0x80010400" register "device[0].privacy.enabled" = "1" register "device[0].privacy.gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H21)" + # DDIB for HDMI + register "device[1].name" = ""DD01"" + # TCP0 (DP-1) for port C0 + register "device[2].name" = ""DD02"" + register "device[2].use_pld" = "true" + register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))" + # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1 + register "device[3].name" = ""DD03"" + # TCP2 (DP-3) for port C2 + register "device[4].name" = ""DD04"" + register "device[4].use_pld" = "true" + register "device[4].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" + # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3 + register "device[5].name" = ""DD05"" device generic 0 on probe EPS PRIVACY_SCREEN end end + chip drivers/gfx/generic + register "device_count" = "6" + # DDIA for eDP + register "device[0].name" = ""LCD"" + # DDIB for HDMI + register "device[1].name" = ""DD01"" + # TCP0 (DP-1) for port C0 + register "device[2].name" = ""DD02"" + register "device[2].use_pld" = "true" + register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))" + # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1 + register "device[3].name" = ""DD03"" + # TCP2 (DP-3) for port C2 + register "device[4].name" = ""DD04"" + register "device[4].use_pld" = "true" + register "device[4].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" + # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3 + register "device[5].name" = ""DD05"" + device generic 0 on + probe EPS PRIVACY_SCREEN_ABSENT + end + end end # Integrated Graphics Device device ref dtt on chip drivers/intel/dptf diff --git a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb index 7cdc8c0dbc..421514d72f 100644 --- a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb @@ -69,7 +69,8 @@ chip soc/intel/alderlake device domain 0 on device ref igpu on chip drivers/gfx/generic - register "device_count" = "1" + register "device_count" = "6" + # DDIA for eDP register "device[0].name" = ""LCD"" # Use ChromeOS privacy screen _HID register "device[0].hid" = ""GOOG0010"" @@ -77,10 +78,46 @@ chip soc/intel/alderlake register "device[0].addr" = "0x80010400" register "device[0].privacy.enabled" = "1" register "device[0].privacy.gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H21)" + # DDIB for HDMI + register "device[1].name" = ""DD01"" + # TCP0 (DP-1) for port C0 + register "device[2].name" = ""DD02"" + register "device[2].use_pld" = "true" + register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))" + # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1 + register "device[3].name" = ""DD03"" + # TCP2 (DP-3) for port C2 + register "device[4].name" = ""DD04"" + register "device[4].use_pld" = "true" + register "device[4].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" + # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3 + register "device[5].name" = ""DD05"" device generic 0 on probe EPS PRIVACY_SCREEN end end + chip drivers/gfx/generic + register "device_count" = "6" + # DDIA for eDP + register "device[0].name" = ""LCD"" + # DDIB for HDMI + register "device[1].name" = ""DD01"" + # TCP0 (DP-1) for port C0 + register "device[2].name" = ""DD02"" + register "device[2].use_pld" = "true" + register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))" + # TCP1 (DP-2) is unused for any ports but still enumerated, so GFX device is added for TCP1 + register "device[3].name" = ""DD03"" + # TCP2 (DP-3) for port C2 + register "device[4].name" = ""DD04"" + register "device[4].use_pld" = "true" + register "device[4].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" + # TCP3 (DP-4) is unused for any ports but still enumerated, so GFX device is added for TCP3 + register "device[5].name" = ""DD05"" + device generic 0 on + probe EPS PRIVACY_SCREEN_ABSENT + end + end end # Integrated Graphics Device device ref dtt on chip drivers/intel/dptf |