diff options
| author | Usha P <usha.p@intel.com> | 2022-03-18 10:59:06 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-13 15:08:45 +0000 |
| commit | 300946a5a191fcaff09c099e0aaddeec0b29fa76 (patch) | |
| tree | 40e21203b7918afce0bfc6a2929e97a9069f0782 | |
| parent | c73440844d009d60c7ce86747072166c8b5cf3ec (diff) | |
mb/intel/adlrvp: Disable PM Timer for ADL-N
Keeping the PM timer enabled will disqualify an ADL system from entering
S0i3, and will also cause an increase in power during suspend states.
The PM timer is not required for ADL-N boards, therefore disabling it.
BRANCH=NONE
TEST=Build and boot ADL-N RVP. Verify system is entering S0i3 state.
localhost ~ # cat /sys/kernel/debug/pmc_core/substate_residencies
Substate Residency
S0i2.0 0
S0i3.0 13196801
Signed-off-by: Usha P <usha.p@intel.com>
Change-Id: I44651bf55df8e71a0a5a9a33ecbb8322ecd18575
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62915
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
| -rw-r--r-- | src/mainboard/intel/adlrvp/Kconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig index 20c37a09ad..82ba5e4604 100644 --- a/src/mainboard/intel/adlrvp/Kconfig +++ b/src/mainboard/intel/adlrvp/Kconfig @@ -160,6 +160,9 @@ config UART_FOR_CONSOLE config DRIVER_TPM_SPI_BUS default 0x2 if BOARD_INTEL_ADLRVP_M_EXT_EC +config USE_PM_ACPI_TIMER + default n if BOARD_INTEL_ADLRVP_N_EXT_EC || BOARD_INTEL_ADLRVP_N + config TPM_TIS_ACPI_INTERRUPT int default 67 if BOARD_INTEL_ADLRVP_M_EXT_EC # GPE0_DW2_3 (GPP_E3) |