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authorJoe Moore <awokd@danwin1210.me>2019-10-16 05:27:41 -0600
committerPatrick Georgi <pgeorgi@google.com>2019-10-22 12:51:36 +0000
commit2f2e113f6077b57c20d482fafaac1b3331ad9f8d (patch)
tree967b5f7fc42060ae101bb9854732d716512d207a
parent5bba746f98eb0d8f434a0583cfef9d665cc484e9 (diff)
vc/amd/agesa/f16kb: Cast to UINT64 to avoid overflow
Evaluated using 32-bit arithmetic, then used in a context that expects an expression of type UINT64. Cast to UINT64 instead. Change-Id: I4f0aa26e116b47505633897c790ca8e86ea5dc4e Signed-off-by: Joe Moore <awokd@danwin1210.me> Found-by: Coverity CID 1241847 Reviewed-on: https://review.coreboot.org/c/coreboot/+/36081 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r--src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/DMI/mfDMI.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/DMI/mfDMI.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/DMI/mfDMI.c
index 856a21af33..2f919d76e2 100644
--- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/DMI/mfDMI.c
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/DMI/mfDMI.c
@@ -716,7 +716,7 @@ MemFGetDctInterleavedLimit (
UINT8 i;
DctMemLimit = 0;
- if (DctInterleavedMemSize == NBPtr->DCTPtr->Timings.DctMemSize << 6) {
+ if (DctInterleavedMemSize == (UINT64)(NBPtr->DCTPtr->Timings.DctMemSize) << 6) {
// The whole memory range is interleaved for the DCTs with the minimum memory size
for (i = 0; i < NBPtr->DctCount; i++) {
DctMemLimit += DctInterleavedMemSize;