diff options
| author | Subrata Banik <subratabanik@google.com> | 2023-04-14 01:45:12 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-04-22 05:38:20 +0000 |
| commit | 2e8df3784c4daa5e8cfdbf74061ede13da74fdbb (patch) | |
| tree | 2810e528903d95159ca29422127abc88893f88a5 | |
| parent | 9bb269060954e740fd117036281072288814e302 (diff) | |
mb/google/brya: Enable CSE FPT Info config for Nissa
Google Brya variants like Nissa family selects
`SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION` to store CSE FPT
information.
BUG=b:273661726
TEST=Able to build and boot google/marasov.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I234b5d272077de9a6f0a9ba69fa015cda7ebd56c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74387
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
| -rw-r--r-- | src/mainboard/google/brya/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 9aa3254795..eb1790e984 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -85,6 +85,7 @@ config BOARD_GOOGLE_BASEBOARD_NISSA select SOC_INTEL_ALDERLAKE_PCH_N select SOC_INTEL_CSE_LITE_COMPRESS_ME_RW select SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE + select SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION select SYSTEM_TYPE_LAPTOP select TPM_GOOGLE_TI50 select SOC_INTEL_COMMON_MMC_OVERRIDE |