diff options
author | V Sowmya <v.sowmya@intel.com> | 2022-04-05 17:03:04 +0530 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-18 20:37:48 +0000 |
commit | 2af96025fcde0727d7bc358c90cadbe07645e084 (patch) | |
tree | 81537f07ccf99eb3a79b0dbbadd264b4309161bb | |
parent | 7de81d5017fcbdcbc88ea77b22d2bdc9393bed09 (diff) |
soc/intel/alderlake: Update the VccIn Aux Imon IccMax
This patch updates the VccIn Aux Imon IccMax for ADL-N to SOC SKU
specific value of 27A.
Kit: 646929 - ADL N Platform Design Guide
BUG=b:223102016
TEST=Verified that VccIn Aux Imon IccMax value is set to 27mA.
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: If09cd1112fac9b30ff04c45aa5a6062c2513c715
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63372
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
-rw-r--r-- | src/soc/intel/alderlake/fsp_params.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 34e949066d..a427289149 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -42,6 +42,7 @@ #define ICC_MAX_TDP_45W 34250 #define ICC_MAX_TDP_15W_28W 32000 #define ICC_MAX_ID_ADL_M_MA 12000 +#define ICC_MAX_ID_ADL_N_MA 27000 /* * ME End of Post configuration @@ -346,6 +347,11 @@ static uint16_t get_vccin_aux_imon_iccmax(void) case PCI_DID_INTEL_ADL_M_ID_1: case PCI_DID_INTEL_ADL_M_ID_2: return ICC_MAX_ID_ADL_M_MA; + case PCI_DID_INTEL_ADL_N_ID_1: + case PCI_DID_INTEL_ADL_N_ID_2: + case PCI_DID_INTEL_ADL_N_ID_3: + case PCI_DID_INTEL_ADL_N_ID_4: + return ICC_MAX_ID_ADL_N_MA; default: printk(BIOS_ERR, "Unknown MCH ID: 0x%4x, skipping VccInAuxImonIccMax config\n", mch_id); |