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| author | Angel Pons <th3fanbus@gmail.com> | 2020-11-19 11:07:27 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-22 22:13:01 +0000 |
| commit | 2ad03a43ecf0c97634f27ebcc2132b8e4286ceb3 (patch) | |
| tree | f8e537b0cc5040d37f278f6b159127a1d4fd2aaf | |
| parent | 1146332b9c3a0a21424b72bf7e68f07eb370f60b (diff) | |
nb/intel/sandybridge: Lower tPRPDEN to 1
This is the default value, and matches what vendor firmware does.
Change-Id: Id0c9758a845d711a87c4b06f89fa0926ae658e02
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47745
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 6ba91c96e3..b06734c0e0 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -175,7 +175,7 @@ void dram_timing_regs(ramctr_timing *ctrl) .tXP = ctrl->tXP, .tAONPD = ctrl->tAONPD, .tCPDED = 2, - .tPRPDEN = 2, + .tPRPDEN = 1, }; /* |