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authorKarthikeyan Ramasubramanian <kramasub@google.com>2021-03-25 18:07:12 -0600
committerPatrick Georgi <pgeorgi@google.com>2021-04-10 20:22:40 +0000
commit24295573503e5617fa18dcec24ae3f3402e452de (patch)
tree3f18102cd8b2be2da925c4d1c6e353207ac445a4
parent65b0afe9a687aebeed70eccd78e1ad99b96bc8bc (diff)
soc/amd/common: Handle power resume after power failure
Introduce a power management library to handle the power resume after power failure. Enable HAVE_POWER_STATE_AFTER_FAILURE config when this library is enabled. BUG=b:183739671 TEST=Build Guybrush and Majolica mainboard. Change-Id: Iea4ea57d747425fe6714d40ba6e60f2447febf28 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51924 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
-rw-r--r--src/soc/amd/common/block/include/amdblocks/pmlib.h20
-rw-r--r--src/soc/amd/common/block/pm/Kconfig13
-rw-r--r--src/soc/amd/common/block/pm/Makefile.inc1
-rw-r--r--src/soc/amd/common/block/pm/pmlib.c43
4 files changed, 77 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/pmlib.h b/src/soc/amd/common/block/include/amdblocks/pmlib.h
new file mode 100644
index 0000000000..c778664a49
--- /dev/null
+++ b/src/soc/amd/common/block/include/amdblocks/pmlib.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef SOC_AMD_COMMON_BLOCK_PMLIB_H
+#define SOC_AMD_COMMON_BLOCK_PMLIB_H
+
+enum {
+ MAINBOARD_POWER_STATE_OFF,
+ MAINBOARD_POWER_STATE_ON,
+ MAINBOARD_POWER_STATE_PREVIOUS,
+};
+
+/*
+ * Configure power state to go into when power is reapplied.
+ *
+ * This function is invoked by SoC during the boot and configures the power state based on
+ * selected config items.
+ */
+void pm_set_power_failure_state(void);
+
+#endif /* SOC_AMD_COMMON_BLOCK_PMLIB_H */
diff --git a/src/soc/amd/common/block/pm/Kconfig b/src/soc/amd/common/block/pm/Kconfig
new file mode 100644
index 0000000000..c976d017ec
--- /dev/null
+++ b/src/soc/amd/common/block/pm/Kconfig
@@ -0,0 +1,13 @@
+config SOC_AMD_COMMON_BLOCK_PM
+ bool
+ depends on SOC_AMD_COMMON_BLOCK_ACPIMMIO
+ select HAVE_POWER_STATE_AFTER_FAILURE
+ help
+ AMD Processor common code for Power Management (PM) subsystem.
+
+if SOC_AMD_COMMON_BLOCK_PM
+
+config POWER_STATE_DEFAULT_ON_AFTER_FAILURE
+ default y
+
+endif # SOC_AMD_COMMON_BLOCK_PM
diff --git a/src/soc/amd/common/block/pm/Makefile.inc b/src/soc/amd/common/block/pm/Makefile.inc
new file mode 100644
index 0000000000..f465e99ec1
--- /dev/null
+++ b/src/soc/amd/common/block/pm/Makefile.inc
@@ -0,0 +1 @@
+bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM) += pmlib.c
diff --git a/src/soc/amd/common/block/pm/pmlib.c b/src/soc/amd/common/block/pm/pmlib.c
new file mode 100644
index 0000000000..9cb9d528b9
--- /dev/null
+++ b/src/soc/amd/common/block/pm/pmlib.c
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <amdblocks/acpimmio.h>
+#include <amdblocks/pmlib.h>
+#include <console/console.h>
+#include <types.h>
+
+#define PM_RTC_SHADOW_REG 0x5b
+/* Init bit to be set by BIOS while configuring the PWR_FAIL_* shadow bits. */
+#define PWR_FAIL_INIT BIT(2)
+#define PWR_FAIL_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3))
+#define PWR_FAIL_OFF 0x0 /* Always power off after power resumes */
+#define PWR_FAIL_ON 0x1 /* Always power on after power resumes */
+#define PWR_FAIL_PREV 0x3 /* Use previous setting after power resumes */
+
+void pm_set_power_failure_state(void)
+{
+ uint8_t val, pwr_fail = PWR_FAIL_INIT;
+
+ switch (CONFIG_MAINBOARD_POWER_FAILURE_STATE) {
+ case MAINBOARD_POWER_STATE_OFF:
+ printk(BIOS_INFO, "Set power off after power failure.\n");
+ pwr_fail |= PWR_FAIL_OFF;
+ break;
+ case MAINBOARD_POWER_STATE_ON:
+ printk(BIOS_INFO, "Set power on after power failure.\n");
+ pwr_fail |= PWR_FAIL_ON;
+ break;
+ case MAINBOARD_POWER_STATE_PREVIOUS:
+ printk(BIOS_INFO, "Keep power state after power failure.\n");
+ pwr_fail |= PWR_FAIL_PREV;
+ break;
+ default:
+ printk(BIOS_WARNING, "WARNING: Unknown power-failure state: %d\n",
+ CONFIG_MAINBOARD_POWER_FAILURE_STATE);
+ pwr_fail |= PWR_FAIL_OFF;
+ break;
+ }
+
+ val = pm_io_read8(PM_RTC_SHADOW_REG) & ~PWR_FAIL_MASK;
+ val |= pwr_fail;
+ pm_io_write8(PM_RTC_SHADOW_REG, val);
+}