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authorNaresh G Solanki <naresh.solanki@intel.com>2016-11-06 14:09:06 +0530
committerMartin Roth <martinroth@google.com>2016-11-07 20:54:06 +0100
commit2413cf3dd16dac52e754dcdbc6513b83dd09e0d6 (patch)
tree30fc01574bbbb1e58204de0aec2b6edc1f4d34f1
parentdd397f0971c140e3a5b80eb0c568384c154a60e6 (diff)
mainboard/intel/kblrvp: Enable Build with ChromeOS
Enable building with ChromeOS support. Change-Id: I9fbb7422be205b304253478a70e334a63afab71f Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Reviewed-on: https://review.coreboot.org/17250 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r--src/mainboard/intel/kblrvp/Kconfig1
-rw-r--r--src/mainboard/intel/kblrvp/dsdt.asl2
2 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/intel/kblrvp/Kconfig b/src/mainboard/intel/kblrvp/Kconfig
index 9427c9db2f..7df726c331 100644
--- a/src/mainboard/intel/kblrvp/Kconfig
+++ b/src/mainboard/intel/kblrvp/Kconfig
@@ -11,6 +11,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MONOTONIC_TIMER_MSR
select SOC_INTEL_SKYLAKE
select MAINBOARD_USES_FSP2_0
+ select MAINBOARD_HAS_CHROMEOS
config CHROMEOS
select LID_SWITCH
diff --git a/src/mainboard/intel/kblrvp/dsdt.asl b/src/mainboard/intel/kblrvp/dsdt.asl
index ebbdeec1d6..25e6a30a6d 100644
--- a/src/mainboard/intel/kblrvp/dsdt.asl
+++ b/src/mainboard/intel/kblrvp/dsdt.asl
@@ -44,8 +44,10 @@ DefinitionBlock(
#include "acpi/dptf.asl"
}
+#if IS_ENABLED(CONFIG_CHROMEOS)
// Chrome OS specific
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
+#endif
// Chipset specific sleep states
#include <soc/intel/skylake/acpi/sleepstates.asl>