diff options
author | Derek Huang <derekhuang@google.com> | 2023-09-01 07:55:40 +0000 |
---|---|---|
committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2023-09-14 01:56:09 +0000 |
commit | 218964078669de938aaac75e48dc86af69bda2c1 (patch) | |
tree | 2080f58f0146eb3ab1f8c6f77a01944802b76600 | |
parent | c6f4738f9883750213e54e34fdcc3ece2bd59c7f (diff) |
chromeos/cse_board_reset.c: Clear EC AP_IDLE flag
When CSE jumps between RO and RW, it triggers global reset so the
AP goes down to S5 and back to S0. For Chromebox, when AP goes
down to S5 EC set AP_IDLE flag. This cause an issue to warm reset
the Chromebox device when it is in recovery mode and powered by
USB-C adapter. This patch allows AP to direct EC to clear AP_IDLE
flag before trigger reset.
BUG=b:296173534
BRANCH=firmware-dedede-136-6.B
TEST=Chromebox DUT which is powered by USB-C adapter boots up
after warm reset in recovery mode
Change-Id: Ib0002c1b8313c6f25d2b8767c60639aed8a4f904
Signed-off-by: Derek Huang <derekhuang@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77632
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Daisuke Nojiri <dnojiri@google.com>
-rw-r--r-- | src/soc/intel/common/block/cse/Kconfig | 8 | ||||
-rw-r--r-- | src/vendorcode/google/chromeos/cse_board_reset.c | 3 |
2 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig index f373bd9c8c..b6e2ecb6d4 100644 --- a/src/soc/intel/common/block/cse/Kconfig +++ b/src/soc/intel/common/block/cse/Kconfig @@ -379,3 +379,11 @@ config CSE_BPDT_VERSION This config indicates the BPDT version used by CSE for a given SoC. endif + +config CSE_RESET_CLEAR_EC_AP_IDLE_FLAG + bool + default y if !SYSTEM_TYPE_LAPTOP + help + Select this if the variant is a Chromebox/base. This allows AP to direct EC + to clear AP_IDLE flag before triggering reset to make sure AP can boot up + after reset. diff --git a/src/vendorcode/google/chromeos/cse_board_reset.c b/src/vendorcode/google/chromeos/cse_board_reset.c index 08db7e2b28..9efc4e61f6 100644 --- a/src/vendorcode/google/chromeos/cse_board_reset.c +++ b/src/vendorcode/google/chromeos/cse_board_reset.c @@ -16,6 +16,9 @@ void cse_board_reset(void) int ret; struct cr50_firmware_version version; + if (CONFIG(CSE_RESET_CLEAR_EC_AP_IDLE_FLAG)) + google_chromeec_clear_ec_ap_idle(); + if (CONFIG(TPM2) && CONFIG(TPM_GOOGLE_CR50)) { /* Initialize TPM and get the cr50 firmware version. */ ret = tlcl_lib_init(); |