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authorMaxim Polyakov <max.senia.poliak@gmail.com>2024-09-20 22:25:58 +0300
committerMartin L Roth <gaumless@gmail.com>2024-10-07 21:08:10 +0000
commit1ec25777df4bd40f174fd7083ce60aec46141e2b (patch)
tree0e002578d5851faa58a1abf346e9250efa6a1f05
parent8cf60670b22db5c66c8cdfded335b01321846e22 (diff)
soc/intel/cannonlake: Add missing USB port aliases
FSP for Comet Lake S allows one to configure 16 USB2 (PortUsb20Enable array) ports and 10 USB3 (PortUsb30Enable array) ports [1, 2]. [1] src/soc/intel/cannonlake/chip.h [2] 3rdparty/fsp/CometLakeFspBinPkg/CometLakeS/Include/FspsUpd.h Change-Id: Ie69543f335be1a69cf0c068335c2e17eebf4c6a9 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84442 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
-rw-r--r--src/soc/intel/cannonlake/chipset_pch_h.cb24
1 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/chipset_pch_h.cb b/src/soc/intel/cannonlake/chipset_pch_h.cb
index 231c8d262a..22e5d7a1c2 100644
--- a/src/soc/intel/cannonlake/chipset_pch_h.cb
+++ b/src/soc/intel/cannonlake/chipset_pch_h.cb
@@ -55,6 +55,18 @@ chip soc/intel/cannonlake
device usb 2.b alias usb2_port12 off end
end
chip drivers/usb/acpi
+ device usb 2.c alias usb2_port13 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.d alias usb2_port14 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.e alias usb2_port15 off end
+ end
+ chip drivers/usb/acpi
+ device usb 2.f alias usb2_port16 off end
+ end
+ chip drivers/usb/acpi
device usb 3.0 alias usb3_port1 off end
end
chip drivers/usb/acpi
@@ -72,6 +84,18 @@ chip soc/intel/cannonlake
chip drivers/usb/acpi
device usb 3.5 alias usb3_port6 off end
end
+ chip drivers/usb/acpi
+ device usb 3.6 alias usb3_port7 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.7 alias usb3_port8 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.8 alias usb3_port9 off end
+ end
+ chip drivers/usb/acpi
+ device usb 3.9 alias usb3_port10 off end
+ end
end
end
end