diff options
| author | Varshit B Pandya <varshit.b.pandya@intel.com> | 2022-06-13 18:08:39 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-15 13:13:08 +0000 |
| commit | 15d99c718d55aeeb8ea4f4b469c61ee3125e117c (patch) | |
| tree | 614c5551fcbd349cc93c05154bd32ca351ebe65d | |
| parent | 69c9b01efafbfb1f320f074e3e450d1c175bf03b (diff) | |
mb/google/brya/var/brya4es: Enable CNVi ddr rfim
enable_cnvi_ddr_rfim enables DDR RFI mitigation feature, this feature
needs to be enabled for all brya variants. Currently, it's not enabled
for brya4es.
BUG=b:201724512
TEST=Build, boot brya4es and check function 3 in _DSM method under
\_SB.PCI0.WFA3
Signed-off-by: Varshit B Pandya <varshit.b.pandya@intel.com>
Change-Id: I6cc9d3e4721188dcbc8584596c9f3f89a737206f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65110
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Meera Ravindranath <meera.ravindranath@intel.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/google/brya/variants/brya4es/overridetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/brya4es/overridetree.cb b/src/mainboard/google/brya/variants/brya4es/overridetree.cb index 87c56c8960..9d9233b9d5 100644 --- a/src/mainboard/google/brya/variants/brya4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya4es/overridetree.cb @@ -184,6 +184,7 @@ chip soc/intel/alderlake device ref cnvi_wifi on chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" + register "enable_cnvi_ddr_rfim" = "true" device generic 0 on end end end |