diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-04-29 02:56:07 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-05-04 19:06:09 +0000 |
| commit | 1591f8437c7abd1a65e585012d82a4ecaf6cebad (patch) | |
| tree | 4d49bd58771a9f4b4f9e0caa9bf4f30f7c12e868 | |
| parent | b70b980ddad48717bfd57a34716d6e4a5d80d212 (diff) | |
soc/amd/common/block/lpc/lpc: simplify index handling in read resources
Now that we don't need to find a specific resource in the set resources
function any more, there's no need to use hard-coded indices for the
fixed resources. Instead use an index variable that gets incremented
after each fixed resource got added. The index now starts at 0 instead
of at 1, but now the only requirement is that those indices are unique.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ida5f1f001c622da2e31474b62832782f5f303a32
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74849
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Himanshu Sahdev <himanshu.sahdev@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
| -rw-r--r-- | src/soc/amd/common/block/lpc/lpc.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/soc/amd/common/block/lpc/lpc.c b/src/soc/amd/common/block/lpc/lpc.c index 79a1d59e4d..3d5775fe35 100644 --- a/src/soc/amd/common/block/lpc/lpc.c +++ b/src/soc/amd/common/block/lpc/lpc.c @@ -106,6 +106,7 @@ static void lpc_init(struct device *dev) static void lpc_read_resources(struct device *dev) { struct resource *res; + unsigned long idx = 0; /* Get the normal pci resources of this device */ pci_dev_read_resources(dev); @@ -118,20 +119,20 @@ static void lpc_read_resources(struct device *dev) IORESOURCE_ASSIGNED | IORESOURCE_FIXED; /* Only up to 16 MByte of the SPI flash can be mapped right below 4 GB */ - mmio_range(dev, 1, FLASH_BELOW_4GB_MAPPING_REGION_BASE, + mmio_range(dev, idx++, FLASH_BELOW_4GB_MAPPING_REGION_BASE, FLASH_BELOW_4GB_MAPPING_REGION_SIZE); /* Add a memory resource for the SPI BAR. */ - mmio_range(dev, 2, SPI_BASE_ADDRESS, 4 * KiB); + mmio_range(dev, idx++, SPI_BASE_ADDRESS, 4 * KiB); /* Add a memory resource for the eSPI MMIO */ - mmio_range(dev, 3, SPI_BASE_ADDRESS + ESPI_OFFSET_FROM_BAR, 4 * KiB); + mmio_range(dev, idx++, SPI_BASE_ADDRESS + ESPI_OFFSET_FROM_BAR, 4 * KiB); /* FCH IOAPIC */ - mmio_range(dev, 4, IO_APIC_ADDR, 4 * KiB); + mmio_range(dev, idx++, IO_APIC_ADDR, 4 * KiB); /* HPET */ - mmio_range(dev, 5, HPET_BASE_ADDRESS, 4 * KiB); + mmio_range(dev, idx++, HPET_BASE_ADDRESS, 4 * KiB); compact_resources(dev); } |