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authorJeremy Compostella <jeremy.compostella@intel.com>2022-06-07 10:25:43 -0700
committerFelix Held <felix-coreboot@felixheld.de>2022-06-15 23:57:15 +0000
commit14908bf05ad3cb5a44c1a0a8197f04e5cd8658d9 (patch)
tree3fef2a666535731b0df563640fd132c69ebf817d
parent52ab283f008f47288620b9a67992f064a1d810fa (diff)
soc/intel/alderlake: remove unnecessary test condition
mch_id is set to zero and then unnecessarily tested. TEST=build and boot image on ADL RVP board Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Change-Id: I20734e1638714027b976043b3a0457cbf3cd8442 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65121 Reviewed-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Reviewed-by: Cliff Huang <cliff.huang@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/alderlake/vr_config.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/src/soc/intel/alderlake/vr_config.c b/src/soc/intel/alderlake/vr_config.c
index 569fd845d8..1cef07a103 100644
--- a/src/soc/intel/alderlake/vr_config.c
+++ b/src/soc/intel/alderlake/vr_config.c
@@ -181,13 +181,9 @@ void fill_vr_domain_config(FSP_S_CONFIG *s_cfg,
s_cfg->TdcTimeWindow[domain] = cfg->tdc_timewindow;
s_cfg->TdcCurrentLimit[domain] = cfg->tdc_currentlimit;
} else {
- uint16_t mch_id = 0;
uint8_t tdp = get_cpu_tdp();
-
- if (!mch_id) {
- struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
- mch_id = dev ? pci_read_config16(dev, PCI_DEVICE_ID) : 0xffff;
- }
+ struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
+ uint16_t mch_id = dev ? pci_read_config16(dev, PCI_DEVICE_ID) : 0xffff;
s_cfg->AcLoadline[domain] = load_table(vr_config_ll, ARRAY_SIZE(vr_config_ll),
domain, mch_id, tdp);