soc/mediatek/mt8183: Adjust DRAM voltages for each DRAM frequency

This patch supports voltage adjustment for each DRAM frequency, which is
neccesary to support DVFS switch.

BUG=b:80501386,b:142358843
BRANCH=none
TEST=Boots correctly and stress test pass on Kukui.

Change-Id: I9539473ff708f9d0d39eb17bd3fdcb916265d33e
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35017
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>

1 files changed, 28 insertions, 0 deletions

diff --git a/src/soc/mediatek/mt8183/emi.c b/src/soc/mediatek/mt8183/emi.c
index 4b08a10c08..c644dc3f96 100644
--- a/src/soc/mediatek/mt8183/emi.c
+++ b/src/soc/mediatek/mt8183/emi.c
@@ -19,6 +19,7 @@
 #include <soc/dramc_register.h>
 #include <soc/emi.h>
 #include <soc/infracfg.h>
+#include <soc/mt6358.h>
 
 static const u8 freq_shuffle[DRAM_DFS_SHUFFLE_MAX] = {
 	[DRAM_DFS_SHUFFLE_1] = LP4X_DDR3200,
@@ -39,6 +40,13 @@ u32 frequency_table[LP4X_DDRFREQ_MAX] = {
 	[LP4X_DDR3600] = 3600,
 };
 
+static const u32 vcore_lp4x[LP4X_DDRFREQ_MAX] = {
+	[LP4X_DDR1600] = 725000,
+	[LP4X_DDR2400] = 725000,
+	[LP4X_DDR3200] = 762500,
+	[LP4X_DDR3600] = 800000,
+};
+
 struct emi_regs *emi_regs = (void *)EMI_BASE;
 const u8 phy_mapping[CHANNEL_MAX][16] = {
 	[CHANNEL_A] = {
@@ -180,6 +188,24 @@ static void global_option_init(const struct sdram_params *params)
 	set_MRR_pinmux_mapping();
 }
 
+static void set_vcore_voltage(u8 freq_group)
+{
+	const u32 vcore = vcore_lp4x[freq_group];
+	dramc_dbg("Set DRAM voltage (freq %d): vcore = %u\n",
+		  frequency_table[freq_group], vcore);
+	pmic_set_vcore_vol(vcore);
+}
+
+static void set_vdram1_vddq_voltage(void)
+{
+	const u32 vdram1 = 1125000;
+	const u32 vddq = 600000;
+	dramc_dbg("Set DRAM voltage: vdram1 = %u, vddq = %u\n",
+		  vdram1, vddq);
+	pmic_set_vdram1_vol(vdram1);
+	pmic_set_vddq_vol(vddq);
+}
+
 static void emi_esl_setting1(void)
 {
 	dramc_set_broadcast(DRAMC_BROADCAST_ON);
@@ -373,6 +399,8 @@ int mt_set_emi(const struct dramc_param *dparam)
 	current_freqsel = freq_tbl[shuffle];
 	params = &dparam->freq_params[shuffle];
 
+	set_vcore_voltage(current_freqsel);
+	set_vdram1_vddq_voltage();
 	init_dram(params, current_freqsel);
 	if (do_calib(params, current_freqsel) != 0)
 		return -1;