diff options
| author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-04-16 16:48:55 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-18 09:54:45 +0000 |
| commit | 08c4ce851ed7902207febb15047330e992f8db17 (patch) | |
| tree | 9ff610b452df81ee5ae5f454686a10a79cf0fd5b | |
| parent | 4d25212346c7cb1c245e123cb4e706998aa7197b (diff) | |
soc/amd/stoneyridge/include/soc/gpio.h: Remove vendor code reference
With the exception of code that deals directly or indirectly with AGESA,
all other code should be independent of vendor code reference. Therefore,
remove vendor code reference from any GPIO code.
BUG=b:77999987
TEST=Build and boot grunt.
Change-Id: I9ba78767a269ad6b9b06fa11993d8a12350e4bad
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/25695
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Garrett Kirkendall <garrett.kirkendall@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/amd/gardenia/gpio.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/gpio.h | 21 |
3 files changed, 9 insertions, 15 deletions
diff --git a/src/mainboard/amd/gardenia/gpio.c b/src/mainboard/amd/gardenia/gpio.c index cb10e74a62..6672ea5c21 100644 --- a/src/mainboard/amd/gardenia/gpio.c +++ b/src/mainboard/amd/gardenia/gpio.c @@ -13,8 +13,6 @@ * GNU General Public License for more details. */ -#include <amdblocks/agesawrapper.h> -#include <amdblocks/BiosCallOuts.h> #include <soc/southbridge.h> #include <stdlib.h> #include <soc/gpio.h> diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h index bc35ff5a1f..e827a72d3e 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h @@ -20,7 +20,6 @@ #include <stddef.h> #include <soc/smi.h> #include <soc/southbridge.h> -#include <amdblocks/agesawrapper.h> const struct sci_source *get_gpe_table(size_t *num); uint8_t variant_memory_sku(void); diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h index e1ae5dda09..cbc99e4d31 100644 --- a/src/soc/amd/stoneyridge/include/soc/gpio.h +++ b/src/soc/amd/stoneyridge/include/soc/gpio.h @@ -46,14 +46,6 @@ #define GPIO_INT_STATUS (1 << 28) #define GPIO_WAKE_STATUS (1 << 29) -/* - * The definitions below should be used to make GPIO arrays compact and - * easy to understand. - */ -#define INPUT 0 -#define OUTPUT_H (FCH_GPIO_OUTPUT_ENABLE | FCH_GPIO_OUTPUT_VALUE) -#define OUTPUT_L FCH_GPIO_OUTPUT_ENABLE - /* GPIO_0 - GPIO_62 */ #define GPIO_BANK0_CONTROL(gpio) \ (AMD_SB_ACPI_MMIO_ADDR + 0x1500 + ((gpio) * 4)) @@ -333,11 +325,16 @@ #define GPIO_148_IOMUX_I2C1_SDA 0 #define GPIO_148_IOMUX_GPIOxx 1 -#define GPIO_OUTPUT_OUT_HIGH (FCH_GPIO_OUTPUT_ENABLE | FCH_GPIO_OUTPUT_VALUE) -#define GPIO_OUTPUT_OUT_LOW FCH_GPIO_OUTPUT_ENABLE +#define GPIO_ENABLE_OUTPUT BIT(7) +#define GPIO_OUTPUT_VALUE BIT(6) +#define GPIO_PULL_DOWN_ENABLE BIT(5) +#define GPIO_PULL_UP_ENABLE BIT(4) + +#define GPIO_OUTPUT_OUT_HIGH (GPIO_ENABLE_OUTPUT | GPIO_OUTPUT_VALUE) +#define GPIO_OUTPUT_OUT_LOW GPIO_ENABLE_OUTPUT -#define GPIO_PULL_PULL_UP FCH_GPIO_PULL_UP_ENABLE -#define GPIO_PULL_PULL_DOWN FCH_GPIO_PULL_DOWN_ENABLE +#define GPIO_PULL_PULL_UP GPIO_PULL_UP_ENABLE +#define GPIO_PULL_PULL_DOWN GPIO_PULL_DOWN_ENABLE #define GPIO_PULL_PULL_NONE 0 /* Native function pad configuration */ |