diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2023-06-28 06:16:36 +0300 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-06 13:53:49 +0000 |
| commit | 053a45bcdb3ccf8a686b35c97e8404c386f65d58 (patch) | |
| tree | 6721c518f75746e1f95dffbf9178f07664d400e5 | |
| parent | 0b5802449d399708068ed7c9a345b4024c2c594d (diff) | |
cpu/x86/lapic: Fix X2APIC_ONLY regression
Some ancient CPUs may have had LAPIC disabled at power-up, so
semantically enable_lapic() should always come before attempting
to access the register banks.
With X2APIC_ONLY option it is necessary to ensure enable_lapic()
is called prior to any other lapic register space accesses,
since the XAPIC mode MMIO accessors are optimised away build-time
and CPU's do not yet initialise for X2APIC mode at reset.
Change-Id: I96eaa5c43108c802375e184e0c68b5091ca0198f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76195
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
| -rw-r--r-- | src/cpu/x86/mtrr/mtrr.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index a3a89fe0cd..f467145074 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -806,6 +806,8 @@ static void _x86_setup_mtrrs(unsigned int above4gb) { int address_size; + enable_lapic(); + x86_setup_fixed_mtrrs(); address_size = cpu_phys_address_size(); printk(BIOS_DEBUG, "apic_id 0x%x setup mtrr for CPU physical address size: %d bits\n", |