soc/intel/meteorlake: Update CSE firmware status registers

The patch updates HFSTS4, HFSTS5 & HFSTS6 register definitions as per
MTL Intel CSME BIOS Specification (doc# 729124). Also, the patch logs
the firmware status details as per the new register definition.

TEST=Build and boot the coreboot on Rex

Snippet from coreboot log with the patch:
	[DEBUG]  ME: CPU Debug Disabled          : NO
	[DEBUG]  ME: TXT Support                 : NO

Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: Ibee9a0955efc22ea0d9fdbba2d09e57d8851e22e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69577
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 17 insertions, 31 deletions

diff --git a/src/soc/intel/meteorlake/me.c b/src/soc/intel/meteorlake/me.c
index ea949025a7..7d89590dc3 100644
--- a/src/soc/intel/meteorlake/me.c
+++ b/src/soc/intel/meteorlake/me.c
@@ -34,15 +34,9 @@ union me_hfsts2 {
 union me_hfsts4 {
 	uint32_t data;
 	struct {
-		uint32_t rsvd0			: 9;
-		uint32_t enforcement_flow	: 1;
-		uint32_t sx_resume_type		: 1;
-		uint32_t rsvd1			: 1;
-		uint32_t tpms_disconnected	: 1;
-		uint32_t rvsd2			: 1;
-		uint32_t fwsts_valid		: 1;
-		uint32_t boot_guard_self_test	: 1;
-		uint32_t rsvd3			: 16;
+		uint32_t rsvd0			: 1;
+		uint32_t flash_log_exist	: 1;
+		uint32_t rsvd1			: 30;
 	} __packed fields;
 };
 
@@ -57,9 +51,14 @@ union me_hfsts5 {
 		uint32_t acm_done_sts		: 1;
 		uint32_t timeout_count		: 7;
 		uint32_t scrtm_indicator	: 1;
-		uint32_t inc_boot_guard_acm	: 4;
-		uint32_t inc_key_manifest	: 4;
-		uint32_t inc_boot_policy	: 4;
+		uint32_t txt_support		: 1;
+		uint32_t btg_profile		: 3;
+		uint32_t cpu_debug_disabled	: 1;
+		uint32_t bsp_init_disabled	: 1;
+		/* BSP Boot Policy Manifest Execution Status */
+		uint32_t bsp_bpm_exe_sts        : 1;
+		uint32_t btg_token_applied	: 1;
+		uint32_t btg_status		: 4;
 		uint32_t rsvd0			: 2;
 		uint32_t start_enforcement	: 1;
 	} __packed fields;
@@ -69,24 +68,11 @@ union me_hfsts5 {
 union me_hfsts6 {
 	uint32_t data;
 	struct {
-		uint32_t force_boot_guard_acm	: 1;
-		uint32_t cpu_debug_disable	: 1;
-		uint32_t bsp_init_disable	: 1;
-		uint32_t protect_bios_env	: 1;
-		uint32_t rsvd0			: 2;
-		uint32_t error_enforce_policy	: 2;
-		uint32_t measured_boot		: 1;
-		uint32_t verified_boot		: 1;
-		uint32_t boot_guard_acmsvn	: 4;
-		uint32_t kmsvn			: 4;
-		uint32_t bpmsvn			: 4;
-		uint32_t key_manifest_id	: 4;
-		uint32_t boot_policy_status	: 1;
-		uint32_t error			: 1;
-		uint32_t boot_guard_disable	: 1;
-		uint32_t fpf_disable		: 1;
+		uint32_t rsvd0			: 21;
+		uint32_t manuf_lock		: 1;
+		uint32_t rsvd2			: 8;
 		uint32_t fpf_soc_lock		: 1;
-		uint32_t txt_support		: 1;
+		uint32_t sx_resume_type		: 1;
 	} __packed fields;
 };
 
@@ -158,9 +144,9 @@ static void dump_me_status(void *unused)
 	printk(BIOS_DEBUG, "ME: Enhanced Debug Mode         : %s\n",
 		hfsts1.fields.invoke_enhance_dbg_mode ? "YES" : "NO");
 	printk(BIOS_DEBUG, "ME: CPU Debug Disabled          : %s\n",
-		hfsts6.fields.cpu_debug_disable ? "YES" : "NO");
+		hfsts5.fields.cpu_debug_disabled ? "YES" : "NO");
 	printk(BIOS_DEBUG, "ME: TXT Support                 : %s\n",
-		hfsts6.fields.txt_support ? "YES" : "NO");
+		hfsts5.fields.txt_support ? "YES" : "NO");
 }
 
 BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, print_me_fw_version, NULL);