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authorUrja Rannikko <urjaman@gmail.com>2015-11-07 15:40:56 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-11-10 00:41:09 +0100
commit00018c82703da3c0a25124bc2548a5aa515f862c (patch)
tree8fefe387e43956cb236fe8651d322e3d4d09f9d3
parent8a3ff6aa34410899fd8b8fcf11f2d3338735578a (diff)
amd/model_fxx: fix code style in FID&VID support check
This is in AP code, fixed in preparation for copying the same check to BSP. Change-Id: I0750919d9fdb3d4e6666221ad82097e0c479cf14 Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-on: http://review.coreboot.org/12359 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r--src/cpu/amd/model_fxx/fidvid.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/cpu/amd/model_fxx/fidvid.c b/src/cpu/amd/model_fxx/fidvid.c
index a005c469ae..9851e6511e 100644
--- a/src/cpu/amd/model_fxx/fidvid.c
+++ b/src/cpu/amd/model_fxx/fidvid.c
@@ -356,9 +356,8 @@ static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid)
u32 fid_max;
int loop;
- if((cpuid_edx(0x80000007)&0x06)!=0x06) {
+ if ((cpuid_edx(0x80000007) & 0x06) != 0x06)
return; /* FID/VID change not supported */
- }
msr = rdmsr(0xc0010042);
fid_max = ((msr.lo >> 16) & 0x3f); /* max fid */