diff options
| author | Tyler Wang <tyler.wang@quanta.corp-partner.google.com> | 2023-10-05 13:51:20 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-10-11 15:07:08 +0000 |
| commit | b8c3d96daa31522775a89225a63ee1d093634094 (patch) | |
| tree | cde1589d9f76d41e20019746f34f9b1c89fd6082 | |
| parent | 155a21974ab720f8b9f1bc832d65b203f2f14ac7 (diff) | |
mb/google/rex/var/karis: Set touchscreen power/reset GPIOs correctly
The tochscreen isn't powered on yet when the detection is done, it
makes touchscren no function.
Set touchscreen power and reset GPIOs correctly in romstage and
ramstage to make the detect feature works.
BUG=b:303130400
TEST=(1) emerge-rex coreboot
(2) Test on karis, touchscreen function works
Change-Id: I6c7815b81eb47fb41e58233fde512ac6b9c000a7
Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78254
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/google/rex/variants/karis/gpio.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/mainboard/google/rex/variants/karis/gpio.c b/src/mainboard/google/rex/variants/karis/gpio.c index 4e5eb68c4c..2a94caee13 100644 --- a/src/mainboard/google/rex/variants/karis/gpio.c +++ b/src/mainboard/google/rex/variants/karis/gpio.c @@ -96,9 +96,9 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_B23, NONE), /* GPP_C00 : [] ==> EN_TCHSCR_PWR */ - PAD_CFG_GPO(GPP_C00, 0, DEEP), + PAD_CFG_GPO(GPP_C00, 1, DEEP), /* GPP_C01 : [] ==> SOC_TCHSCR_RST_R_L */ - PAD_CFG_GPO(GPP_C01, 0, DEEP), + PAD_CFG_GPO(GPP_C01, 1, DEEP), /* GPP_C02 : SOC_TCHSCR_SPI_INT_STRAP ==> Component NC */ PAD_NC(GPP_C02, NONE), /* GPP_C03 : [] ==> Test pad. */ @@ -399,6 +399,10 @@ static const struct pad_config romstage_gpio_table[] = { PAD_CFG_GPO(GPP_A20, 0, DEEP), /* GPP_C23 : [] ==> FP_RST_ODL */ PAD_CFG_GPO(GPP_C23, 0, DEEP), + /* GPP_C00 : [] ==> EN_TCHSCR_PWR */ + PAD_CFG_GPO(GPP_C00, 1, DEEP), + /* GPP_C01 : [] ==> SOC_TCHSCR_RST_R_L */ + PAD_CFG_GPO(GPP_C01, 0, DEEP), /* GPP_D02 : Not Connected */ PAD_NC(GPP_D02, NONE), }; |