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authorSean Rhodes <sean@starlabs.systems>2023-08-23 12:43:38 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-08-25 14:38:31 +0000
commit6319ef97183fe46e0e0e6bdcb5c83aa605db5491 (patch)
tree5d08b0f1795d9f7988af171de68bea77e4b329dc
parent2cd2263c32e3b4f5921119546ecc5ec53afbf7b9 (diff)
soc/intel/apollolake: Correct the logic for the legacy 8254 timer
The `use_8254` should be flipped, the same as the other Intel SOCs. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I2d6c859c0910b796d2ae5874a560ff9974578106 Reviewed-on: https://review.coreboot.org/c/coreboot/+/77409 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
-rw-r--r--src/soc/intel/apollolake/chip.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 0e54fd8291..37b3186af5 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -749,7 +749,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
/* 8254 Timer */
bool use_8254 = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER));
- silconfig->Timer8254ClkSetting = use_8254;
+ silconfig->Timer8254ClkSetting = !use_8254;
/* FSP should let coreboot set subsystem IDs, which are read/write-once */
silconfig->SubSystemVendorId = 0;