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authorNico Huber <nico.huber@secunet.com>2019-02-19 19:11:29 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-25 10:54:38 +0000
commit612a8676779f873f2f7a3c8011ad0eac61ca38f9 (patch)
tree0a4d78f1cce6226b4275723967a942e6fecd1f07
parent4f012694dd3a04fa1166f33656595951eda107b2 (diff)
drivers/intel/gma/acpi: Add Kconfigs for backlight registers
Instead of adding more versions of the `*pch.asl`, unify the existing ones and allow to override the register locations via Kconfig. The current defaults should work for Skylake and some newer platforms. TEST=Booted ThinkPad X201s, backlight control still works. Change-Id: I0b21d9a0288f0f8d6cb0a4776909bffdae7576f5 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31503 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
-rw-r--r--src/drivers/intel/gma/Kconfig16
-rw-r--r--src/drivers/intel/gma/acpi/gma.asl (renamed from src/drivers/intel/gma/acpi/non-pch.asl)7
-rw-r--r--src/drivers/intel/gma/acpi/pch.asl30
-rw-r--r--src/northbridge/intel/gm45/Kconfig6
-rw-r--r--src/northbridge/intel/gm45/acpi/gm45.asl2
-rw-r--r--src/northbridge/intel/haswell/Kconfig3
-rw-r--r--src/northbridge/intel/haswell/acpi/haswell.asl2
-rw-r--r--src/northbridge/intel/ironlake/Kconfig3
-rw-r--r--src/northbridge/intel/ironlake/acpi/ironlake.asl2
-rw-r--r--src/northbridge/intel/sandybridge/Kconfig3
-rw-r--r--src/northbridge/intel/sandybridge/acpi/sandybridge.asl2
-rw-r--r--src/northbridge/intel/x4x/acpi/x4x.asl2
12 files changed, 40 insertions, 38 deletions
diff --git a/src/drivers/intel/gma/Kconfig b/src/drivers/intel/gma/Kconfig
index 68d4edce03..acc25fea29 100644
--- a/src/drivers/intel/gma/Kconfig
+++ b/src/drivers/intel/gma/Kconfig
@@ -29,6 +29,22 @@ config INTEL_GMA_ACPI
bool
default n
+config INTEL_GMA_BCLV_OFFSET
+ hex
+ default 0xc8254
+
+config INTEL_GMA_BCLV_WIDTH
+ int
+ default 16
+
+config INTEL_GMA_BCLM_OFFSET
+ hex
+ default 0xc8256
+
+config INTEL_GMA_BCLM_WIDTH
+ int
+ default 16
+
config INTEL_GMA_SSC_ALTERNATE_REF
bool
default n
diff --git a/src/drivers/intel/gma/acpi/non-pch.asl b/src/drivers/intel/gma/acpi/gma.asl
index b656d484c9..57563933ce 100644
--- a/src/drivers/intel/gma/acpi/non-pch.asl
+++ b/src/drivers/intel/gma/acpi/gma.asl
@@ -19,9 +19,10 @@ Device (GFX0)
OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000)
Field (GFRG, DWordAcc, NoLock, Preserve)
{
- Offset (0x61254),
- BCLV, 16,
- BCLM, 16,
+ Offset (CONFIG_INTEL_GMA_BCLV_OFFSET),
+ BCLV, CONFIG_INTEL_GMA_BCLV_WIDTH,
+ Offset (CONFIG_INTEL_GMA_BCLM_OFFSET),
+ BCLM, CONFIG_INTEL_GMA_BCLM_WIDTH
}
#include "configure_brightness_levels.asl"
diff --git a/src/drivers/intel/gma/acpi/pch.asl b/src/drivers/intel/gma/acpi/pch.asl
deleted file mode 100644
index 942ccf433c..0000000000
--- a/src/drivers/intel/gma/acpi/pch.asl
+++ /dev/null
@@ -1,30 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
-
-Device (GFX0)
-{
- Name (_ADR, 0x00020000)
-
- OperationRegion (GFXC, PCI_Config, 0x00, 0x0100)
- Field (GFXC, DWordAcc, NoLock, Preserve)
- {
- Offset (0x10),
- BAR0, 64,
- Offset (0xe4),
- ASLE, 32,
- Offset (0xfc),
- ASLS, 32,
- }
-
- OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000)
- Field (GFRG, DWordAcc, NoLock, Preserve)
- {
- Offset (0x48254),
- BCLV, 16,
- Offset (0xc8256),
- BCLM, 16
- }
-
-#include "configure_brightness_levels.asl"
-#include "common.asl"
-}
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index 752af43ba1..8857bd4f9b 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -46,4 +46,10 @@ config SMM_RESERVED_SIZE
hex
default 0x100000
+config INTEL_GMA_BCLV_OFFSET
+ default 0x61254
+
+config INTEL_GMA_BCLM_OFFSET
+ default 0x61256
+
endif
diff --git a/src/northbridge/intel/gm45/acpi/gm45.asl b/src/northbridge/intel/gm45/acpi/gm45.asl
index 3a7e46487d..8a30212d1d 100644
--- a/src/northbridge/intel/gm45/acpi/gm45.asl
+++ b/src/northbridge/intel/gm45/acpi/gm45.asl
@@ -75,4 +75,4 @@ Device (PDRC)
#include "peg.asl"
// Integrated graphics 0:2.0
-#include <drivers/intel/gma/acpi/non-pch.asl>
+#include <drivers/intel/gma/acpi/gma.asl>
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index 5e631cf025..06ce371946 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -107,4 +107,7 @@ config RO_REGION_ONLY
depends on VBOOT
default "mrc.bin"
+config INTEL_GMA_BCLV_OFFSET
+ default 0x48254
+
endif
diff --git a/src/northbridge/intel/haswell/acpi/haswell.asl b/src/northbridge/intel/haswell/acpi/haswell.asl
index c0de8532fd..900c6c3396 100644
--- a/src/northbridge/intel/haswell/acpi/haswell.asl
+++ b/src/northbridge/intel/haswell/acpi/haswell.asl
@@ -48,4 +48,4 @@ Device (PDRC)
}
// Integrated graphics 0:2.0
-#include <drivers/intel/gma/acpi/pch.asl>
+#include <drivers/intel/gma/acpi/gma.asl>
diff --git a/src/northbridge/intel/ironlake/Kconfig b/src/northbridge/intel/ironlake/Kconfig
index 638f295dc0..9d937965dd 100644
--- a/src/northbridge/intel/ironlake/Kconfig
+++ b/src/northbridge/intel/ironlake/Kconfig
@@ -61,4 +61,7 @@ config MMCONF_BASE_ADDRESS
hex
default 0xe0000000
+config INTEL_GMA_BCLV_OFFSET
+ default 0x48254
+
endif
diff --git a/src/northbridge/intel/ironlake/acpi/ironlake.asl b/src/northbridge/intel/ironlake/acpi/ironlake.asl
index 52fec1e731..2997dea951 100644
--- a/src/northbridge/intel/ironlake/acpi/ironlake.asl
+++ b/src/northbridge/intel/ironlake/acpi/ironlake.asl
@@ -51,4 +51,4 @@ Device (PDRC)
}
// Integrated graphics 0:2.0
-#include <drivers/intel/gma/acpi/pch.asl>
+#include <drivers/intel/gma/acpi/gma.asl>
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index a9bbf58ef8..29a6db7fb3 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -121,4 +121,7 @@ config MRC_FILE
endif # !USE_NATIVE_RAMINIT
+config INTEL_GMA_BCLV_OFFSET
+ default 0x48254
+
endif
diff --git a/src/northbridge/intel/sandybridge/acpi/sandybridge.asl b/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
index 555058cbe6..202671a3e5 100644
--- a/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
+++ b/src/northbridge/intel/sandybridge/acpi/sandybridge.asl
@@ -55,4 +55,4 @@ Device (PDRC)
}
// Integrated graphics 0:2.0
-#include <drivers/intel/gma/acpi/pch.asl>
+#include <drivers/intel/gma/acpi/gma.asl>
diff --git a/src/northbridge/intel/x4x/acpi/x4x.asl b/src/northbridge/intel/x4x/acpi/x4x.asl
index 5f93b3eee3..09849e3b17 100644
--- a/src/northbridge/intel/x4x/acpi/x4x.asl
+++ b/src/northbridge/intel/x4x/acpi/x4x.asl
@@ -45,4 +45,4 @@ Device (PDRC)
#include "peg.asl"
// Integrated graphics 0:2.0
-#include <drivers/intel/gma/acpi/non-pch.asl>
+#include <drivers/intel/gma/acpi/gma.asl>