diff options
| author | Gabe Black <gabeblack@google.com> | 2013-07-24 03:57:49 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2013-12-21 10:49:04 +0100 |
| commit | e13680bdd04f4d2128f024123784a9131f76faad (patch) | |
| tree | 9c3951fbf0cda5e3e86f5ad112e8304cfca5044d | |
| parent | ad88fda1cf8ad21db47be4a212e1d6e6239d058b (diff) | |
exynos5420: Fix some clock settings
Some registers and bit fields were wrong, but the difference is mostly
academic since the code that uses them are never called.
Change-Id: I0ce5e1529cdda1a4973765af8c31b79130b1111c
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/63189
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/4385
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
| -rw-r--r-- | src/cpu/samsung/exynos5420/clock.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/src/cpu/samsung/exynos5420/clock.c b/src/cpu/samsung/exynos5420/clock.c index 11e46d1b52..ed5b102d94 100644 --- a/src/cpu/samsung/exynos5420/clock.c +++ b/src/cpu/samsung/exynos5420/clock.c @@ -41,9 +41,9 @@ static struct clk_bit_info clk_bit_info[PERIPH_ID_COUNT] = { {12, 16, 24}, {-1, -1, -1}, {16, 0, 8}, /* PERIPH_ID_SROMC */ - {20, 16, 24}, - {24, 0, 8}, - {0, 0, 4}, + {20, 20, 24}, + {24, 24, 8}, + {28, 28, 4}, {4, 12, 16}, {-1, -1, -1}, {-1, -1, -1}, @@ -170,12 +170,9 @@ unsigned long clock_get_periph_rate(enum periph_id peripheral) break; case PERIPH_ID_SPI0: case PERIPH_ID_SPI1: - src = readl(&clk->clk_src_peric1); - div = readl(&clk->clk_div_peric1); - break; case PERIPH_ID_SPI2: src = readl(&clk->clk_src_peric1); - div = readl(&clk->clk_div_peric2); + div = readl(&clk->clk_div_peric1); break; case PERIPH_ID_SPI3: case PERIPH_ID_SPI4: |