diff options
| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2019-11-12 23:35:50 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-18 15:01:09 +0000 |
| commit | 09ea37172eb62d2b675b3d7a1db36c697c49a6da (patch) | |
| tree | f9f18c79991e934e6e5c6b626e0b42d71b091a45 /3rdparty/chromeec | |
| parent | 206905c309a6a7643a61633d0563ad1245fe7f93 (diff) | |
soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode
Below helper function is added:
cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode
'Soft Temporary Disable'. CSE enters this mode when it boots from
RO(BP1) partition. The function must be called after resetting CSE to
wait for CSE to enter 'Soft Temporary Disable' Mode.
BUG=b:145809764
Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36786
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Diffstat (limited to '3rdparty/chromeec')
0 files changed, 0 insertions, 0 deletions