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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-04-29 10:22:42 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-01 16:40:20 +0000 |
| commit | 6468d87dded4be460707533d3de938f709c7d460 (patch) | |
| tree | 2209bb18a98245d81b906b01ea44326b831ab925 /.gitreview | |
| parent | f87ad9225c5dfafc266071bb4757065bca50966f (diff) | |
soc/intel/baytrail: Fix 16-bit read/write PCI_COMMAND register
Change-Id: I9b15b5458bb8140fa9bb6b0ffb6b9c78e8d8a93b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40848
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to '.gitreview')
0 files changed, 0 insertions, 0 deletions