diff options
| author | Sugnan Prabhu S <sugnan.prabhu.s@intel.com> | 2021-07-22 10:35:50 +0530 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-09-01 16:46:27 +0000 |
| commit | 9c348a7b7ea3422a74af9b820275751e9abb4a12 (patch) | |
| tree | c3fa8e32ecd2f85eb086626dc0b8fb99a76946eb /.gitmodules | |
| parent | 7517c39c9e815ef294197a55e3b1fa3e64543697 (diff) | |
soc/intel/alderlake: Fix processor hang while plug unplug of TBT device
Processor hang is observed while hot plug unplug of TBT device. BIOS
should execute TBT PCIe RP RTD3 flow based on the value of
TBT_DMA_CFG_VS_CAP_9[30]. It should skip TBT PCIe RP RTD3 flow, if
BIT30 in TBT FW version is not set.
BUG=b:194880254
Change-Id: Ie3577df519f64c6f7270dc5537278af76536774e
Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56503
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to '.gitmodules')
0 files changed, 0 insertions, 0 deletions