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authorRen Kuo <ren.kuo@quanta.corp-partner.google.com>2022-12-29 13:42:57 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-01-06 11:52:55 +0000
commit9965c8b5b496a876d0f91bf3b3fb00d2d0bf90eb (patch)
tree314b47e55aa87a99478b65889800c5bc6a3e4c85 /.gitmodules
parent91fe94ac9f646582b4007b05a983740784e7fa3c (diff)
mb/google/nissa/var/craask: Modify GPIOs for NVMe
Modify NVMe clkreq pin to GPP_D7 from GPP_D6.The design change is for commonality of GPIO settings. To reserve craask GPIO table and add craaskneto/craaskino's NVMe GPIO setting. In the change, clkreq# will be 2 and clksrc is still 1. BUG=b:259211172 TEST=Verify on reworked craask DUT to boot up from NVMe. Change-Id: If45c1a87144d5370b1ca2525295fb7947639362f Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71170 Reviewed-by: Reka Norman <rekanorman@chromium.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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