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# Config file for Embedded Planet EP405PC board
# This will make a target directory of ./ep405pc
target ep405pc
mainboard embeddedplanet/ep405pc
romimage "normal"
## Enable PPC405 instructions
option CONFIG_CPU_OPT="-mcpu=405"
## use a cross compiler
#option CONFIG_CROSS_COMPILE="powerpc-ibm-eabi-"
## Use stage 1 initialization code
option CONFIG_USE_INIT=1
## Use chip configuration
option CONFIG_CHIP_CONFIGURE=1
## We don't use compressed image
option CONFIG_COMPRESS=0
## Turn off POST codes
option CONFIG_NO_POST=1
## Enable serial console
option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
option CONFIG_CONSOLE_SERIAL8250=1
# Divisor of 69 == 9600 baud due to weird clocking
option CONFIG_TTYS0_DIV=69
option CONFIG_TTYS0_BAUD=9600
## Boot linux from IDE
option CONFIG_IDE=1
option CONFIG_FS_PAYLOAD=1
option CONFIG_FS_EXT2=1
option CONFIG_FS_ISO9660=1
option CONFIG_FS_FAT=1
option CONFIG_AUTOBOOT_CMDLINE="hda1:/vmlinuz"
option CONFIG_ROM_SIZE=1024*1024
## Board has fixed size RAM
option CONFIG_EMBEDDED_RAM_SIZE=64*1024*1024
## Coreboot C code runs at this location in RAM
option CONFIG_RAMBASE=0x00100000
##
## Use a 64K stack
##
option CONFIG_STACK_SIZE=0x10000
##
## Use a 64K heap
##
option CONFIG_HEAP_SIZE=0x10000
##
## System clock
##
option CONFIG_SYS_CLK_FREQ=33
##
option CONFIG_ROMBASE=0xfff00000
## Reset vector address
option CONFIG_RESET=0xfffffffc
## Exception vectors
option CONFIG_EXCEPTION_VECTORS=CONFIG_ROMBASE+0x100
## coreboot ROM start address
option CONFIG_ROMSTART=0xfff03000
## coreboot C code runs at this location in RAM
option CONFIG_RAMBASE=0x00100000
end
buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal"
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