blob: bf5c59850cef4637e21f279d4050c24ad06f6b5b (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
|
# Sample config file for Motorola Sandpoint X3 Demo Board with
# the Arima HDAMA
# This will make a target directory of ./hdama
loadoptions
target hdama
uses CONFIG_ARCH
uses CONFIG_COMPRESS
uses CONFIG_IOAPIC
uses CONFIG_ROM_PAYLOAD
uses CONFIG_ROM_PAYLOAD_START
uses CONFIG_UDELAY_TSC
uses CPU_FIXUP
uses CONFIG_FALLBACK_SIZE
uses CONFIG_HAVE_FALLBACK_BOOT
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_HAVE_HARD_RESET
uses i586
uses i686
uses CONFIG_INTEL_PPRO_MTRR
uses CONFIG_HEAP_SIZE
uses CONFIG_IRQ_SLOT_COUNT
uses k7
uses k8
uses CONFIG_MAINBOARD_PART_NUMBER
uses CONFIG_MAINBOARD_VENDOR
uses CONFIG_SMP
uses CONFIG_MAX_CPUS
uses CONFIG_MEMORY_HOLE
uses CONFIG_PAYLOAD_SIZE
uses CONFIG_RAMBASE
uses CONFIG_ROMBASE
uses CONFIG_ROM_IMAGE_SIZE
uses CONFIG_ROM_SECTION_OFFSET
uses CONFIG_ROM_SECTION_SIZE
uses CONFIG_ROM_SIZE
uses CONFIG_STACK_SIZE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_USE_OPTION_TABLE
uses CONFIG_HAVE_OPTION_TABLE
uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
uses CONFIG_CONSOLE_SERIAL8250
uses CONFIG_MAINBOARD
uses CONFIG_CHIP_CONFIGURE
uses CONFIG_XIP_ROM_SIZE
uses CONFIG_XIP_ROM_BASE
uses COREBOOT_EXTRA_VERSION
option CONFIG_CHIP_CONFIGURE=1
option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
option CONFIG_CONSOLE_SERIAL8250=1
option CPU_FIXUP=1
option CONFIG_UDELAY_TSC=0
option i686=1
option i586=1
option CONFIG_INTEL_PPRO_MTRR=1
option k7=1
option k8=1
option CONFIG_ROM_SIZE=1024*1024
option CONFIG_HAVE_OPTION_TABLE=1
option CONFIG_ROM_PAYLOAD=1
option CONFIG_HAVE_FALLBACK_BOOT=1
###
### Compute the location and size of where this firmware image
### (coreboot plus bootloader) will live in the boot rom chip.
###
option CONFIG_FALLBACK_SIZE=CONFIG_ROM_SIZE
## Coreboot C code runs at this location in RAM
option CONFIG_RAMBASE=0x00004000
#
###
### Compute the start location and size size of
### The coreboot bootloader.
###
#
# Arima hdama
romimage "fallback"
option CONFIG_USE_FALLBACK_IMAGE=1
option CONFIG_ROM_IMAGE_SIZE=0x10000
# option CONFIG_ROM_SECTION_SIZE=0x100000
option COREBOOT_EXTRA_VERSION=".0Fallback"
mainboard arima/hdama
# payload ../../../../tg3--ide_disk.zelf
payload ../../../../opteron_phase1_p4_noapic
# payload ../../../../../../hdama-1
# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
end
buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback"
|
