1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
|
#include "amdlib32.h"
UINT8 ReadIo8 (IN UINT16 port)
{
UINT8 value;
__asm__ __volatile__ ("inb %w1, %b0" : "=a"(value) : "Nd" (port));
return value;
}
UINT16 ReadIo16 (IN UINT16 port)
{
UINT16 value;
__asm__ __volatile__ ("inw %w1, %w0" : "=a"(value) : "Nd" (port));
return value;
}
UINT32 ReadIo32 (IN UINT16 port)
{
UINT32 value;
__asm__ __volatile__ ("inl %w1, %0" : "=a"(value) : "Nd" (port));
return value;
}
VOID WriteIo8 (IN UINT16 port, IN UINT8 value)
{
__asm__ __volatile__ ("outb %b0, %w1" : : "a" (value), "Nd" (port));
}
VOID WriteIo16 (IN UINT16 port, IN UINT16 value)
{
__asm__ __volatile__ ("outw %w0, %w1" : : "a" (value), "Nd" (port));
}
VOID WriteIo32 (IN UINT16 port, IN UINT32 value)
{
__asm__ __volatile__ ("outl %0, %w1" : : "a" (value), "Nd" (port));
}
UINT64 ReadTSC(VOID)
{
struct tsc_struct {
unsigned lo;
unsigned hi;
} res;
UINT64 ret;
__asm__ __volatile__ (
"rdtsc"
: "=a" (res.lo), "=d"(res.hi) /* outputs */
);
ret = res.hi;
ret <<= 32;
ret |= res.lo;
return ret;
}
VOID CpuidRead(IN UINT32 op, IN OUT SB_CPUID_DATA* Data)
{
asm volatile(
"cpuid"
: "=a" (Data->EAX_Reg),
"=b" (Data->EBX_Reg),
"=c" (Data->ECX_Reg),
"=d" (Data->EDX_Reg)
: "0" (op));
}
static inline unsigned int cpuid_ecx(unsigned int op)
{
unsigned int eax, ecx;
__asm__("cpuid"
: "=a" (eax), "=c" (ecx)
: "0" (op)
: "ebx", "edx" );
return ecx;
}
//static inline unsigned get_core_num(void)
UINT8 ReadNumberOfCpuCores(VOID)
{
return (cpuid_ecx(0x80000008) & 0xff);
}
|
