1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
|
/* $NoKeywords:$ */
/**
* @file
*
* Config Fch HwAcpi controller
*
* Init Spread Spectrum features.
*
* @xrefitem bom "File Content Label" "Release Content"
* @e project: AGESA
* @e sub-project: FCH
* @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
*
*/
/*
*****************************************************************************
*
* Copyright (c) 2011, Advanced Micro Devices, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of Advanced Micro Devices, Inc. nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
****************************************************************************
*/
#include "FchPlatform.h"
#include "amdlib.h"
#include "cpuServices.h"
#include "Filecode.h"
#define FILECODE PROC_FCH_HWACPI_FAMILY_HUDSON2_HUDSON2SSSERVICE_FILECODE
/**
* FchInitResetAcpiMmioTable - Fch ACPI MMIO initial
* during the power on stage.
*
*
*
*
*/
ACPI_REG_WRITE FchInitResetAcpiMmioTable[] =
{
{00, 00, 0xB0, 0xAC}, /// Signature
{MISC_BASE >> 8, FCH_MISC_REG41, 0x1F, 0x40}, //keep Auxiliary_14Mclk_Sel [12]
//
// USB 3.0 Reference Clock MISC_REG 0x40 [4] = 0 Enable spread-spectrum reference clock.
//
{MISC_BASE >> 8, FCH_MISC_REG40, 0xEF, 0x00},
{PMIO_BASE >> 8, FCH_PMIOA_REG5D, 0x00, BIT0},
{PMIO_BASE >> 8, FCH_PMIOA_REGD2, 0xCF, BIT4 + BIT5},
{SMBUS_BASE >> 8, FCH_SMBUS_REG12, 0x00, BIT0},
{PMIO_BASE >> 8, FCH_PMIOA_REG28, 0xFF, BIT0},
{PMIO_BASE >> 8, FCH_PMIOA_REG44 + 3, 0x67, BIT7}, /// Disable Boot timer
{PMIO_BASE >> 8, FCH_PMIOA_REG48, 0xFF, BIT0},
{PMIO_BASE >> 8, FCH_PMIOA_REG00, 0xFF, 0x0E},
{PMIO_BASE >> 8, FCH_PMIOA_REG00 + 2, 0xFF, 0x40},
{PMIO_BASE >> 8, FCH_PMIOA_REG00 + 3, 0xFF, 0x08},
{PMIO_BASE >> 8, FCH_PMIOA_REG34, 0xEF, BIT0 + BIT1},
{PMIO_BASE >> 8, FCH_PMIOA_REGEC, 0xFD, BIT1},
{PMIO_BASE >> 8, FCH_PMIOA_REG08, 0xFE, BIT2 + BIT4},
{PMIO_BASE >> 8, FCH_PMIOA_REG08 + 1, 0xFF, BIT0},
{PMIO_BASE >> 8, FCH_PMIOA_REG54, 0x00, BIT4 + BIT6 + BIT7},
{PMIO_BASE >> 8, FCH_PMIOA_REG04 + 3, 0xFD, BIT1},
{PMIO_BASE >> 8, FCH_PMIOA_REG74, 0xF6, BIT0 + BIT3},
{PMIO_BASE >> 8, FCH_PMIOA_REGF0, ~BIT2, 0x00},
//
// GEC I/O Termination Setting
// PM_Reg 0xF6 = Power-on default setting
// PM_Reg 0xF7 = Power-on default setting
// PM_Reg 0xF8 = 0x6C
// PM_Reg 0xF9 = 0x21
// PM_Reg 0xFA = 0x00 Hudson-2 A12 GEC I/O Pad settings for 3.3V CMOS
//
{PMIO_BASE >> 8, FCH_PMIOA_REGF8, 0x00, 0x6C},
{PMIO_BASE >> 8, FCH_PMIOA_REGF8 + 1, 0x00, 0x07},
{PMIO_BASE >> 8, FCH_PMIOA_REGF8 + 2, 0x00, 0x00},
//
// GEC -end
//
{PMIO_BASE >> 8, FCH_PMIOA_REGC4, 0xee, 0x04}, /// Release NB_PCIE_RST
{PMIO_BASE >> 8, FCH_PMIOA_REGC0 + 2, 0xBF, 0x40},
{PMIO_BASE >> 8, FCH_PMIOA_REGBE, 0xDF, BIT5},
//
// Enabling ClkRun Function
//
{PMIO_BASE >> 8, FCH_PMIOA_REGBB, 0xFF, BIT2},
{PMIO_BASE >> 8, FCH_PMIOA_REGD0, ~BIT2, 0},
{0xFF, 0xFF, 0xFF, 0xFF},
};
/**
* ProgramFchHwAcpiResetP - Config SpreadSpectrum before PCI
* emulation
*
*
*
* @param[in] FchDataPtr Fch configuration structure pointer.
*
*/
VOID
ProgramFchHwAcpiResetP (
IN VOID *FchDataPtr
)
{
FCH_RESET_DATA_BLOCK *LocalCfgPtr;
AMD_CONFIG_PARAMS *StdHeader;
LocalCfgPtr = (FCH_RESET_DATA_BLOCK *) FchDataPtr;
StdHeader = &((AMD_RESET_PARAMS *)FchDataPtr)->StdHeader;
//Reset USB, BSOD 9F on Cobia Hudson 2 A12 during S4/S5 loop tests
RwPmio (0xD3, AccessWidth8, ~BIT4, 0, StdHeader);
RwPmio (0xD3, AccessWidth8, ~BIT4, BIT4, StdHeader);
if ( LocalCfgPtr->Cg2Pll == 1 ) {
TurnOffCG2 ();
LocalCfgPtr->SataClkMode = 0x0a;
}
}
|
